IP Library Granted Patent US 9,634,155
Granted Patent B2
US 9,634,155 · App. 13/996,492 · Granted Apr 25, 2017

Method for producing an electrical terminal support

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Quick Facts
Patent No.
US 9,634,155
App. No.
13/996,492
Granted
Apr 25, 2017
Kind
B2
Abstract

The invention relates to a method for producing an electrical terminal support for an optoelectronic semiconductor body, comprising the following steps: providing a carrier assembly ( 1 ), which comprises a carrier body ( 11 ), an intermediate layer ( 12 ) arranged on an outer surface ( 111 ) of the carrier body ( 11 ), and a use layer ( 13 ) arranged on the intermediate layer ( 12 ); introducing at least two openings ( 4 ), which are mutually spaced in the lateral direction (L), in the use layer ( 13 ) via an outer surface ( 131 ) of the use layer ( 13 ), wherein the openings extend completely through the use layer ( 13 ) in the vertical direction (V); electrically insulating lateral surfaces ( 41 ) of the openings ( 4 ) and of the outer face ( 131 ) of the use layer ( 13 ); arranging electrically conductive material ( 6 ) at least in the openings ( 4 ), wherein after completion of the terminal carrier ( 100 ), the electrically conductive material ( 6 ) has an interruption (U) in the progression thereof along the outer surface ( 131 ) of the use layer ( 13 ) in the lateral direction (L) between adjoining openings ( 4 ).

Claims (24)

1. A method for producing an electrical terminal support for an optoelectronic semiconductor body comprising the following steps:

providing a support arrangement having a support body, an intermediate layer arranged on an outer surface of the support body, and a self-supporting utility layer arranged on an outer surface of the intermediate layer facing away from the support body, wherein the utility layer is formed with at least one of the materials Si, AIN, GaN, Ge, GaAs or contains at least one of the materials;

introducing at least two openings arranged in a manner spaced apart from one another in a lateral direction into the utility layer via an outer surface of the utility layer facing away from the support body, wherein the openings extend completely through the utility layer in a vertical direction;

electrically insulating side surfaces of the openings and the outer surface of the utility layer facing away from the support body by an oxidation method, such that the material of the utility layer is surface-oxidized;

arranging electrically conductive material at least in places in the openings;

arranging at least one protective diode structure in the utility layer, wherein the protective diode structure is electrically interconnected with the semiconductor body; and

after arranging the electrically conductive material, removing the support body and the intermediate layer,

wherein the protective diode structure is integrated in the utility layer and does not project from the utility layer in a vertical direction facing away from the support body,

wherein after the terminal support has been completed, the electrically conductive material has at least one interruption in its course along the outer surface of the utility layer in the lateral direction between adjacent openings.

2. The method according to claim 1 , wherein the support body is formed with a silicon and the intermediate layer is formed with an oxide of the silicon or a nitride of the silicon.

3. The method according to claim 1 , wherein the utility layer is formed with at least one of the materials or contains at least one of the materials: Si, N, GaN, Ge, GaAs.

4. The method according to claim 1 , wherein the process of electrically insulating is carried out by means of at least one thermal oxidation method.

5. The method according to claim 1 , wherein the electrically conductive material is introduced in the form of a melt into the openings and subsequently cures, and

wherein the electrically conductive material is formed with at least one of the following materials or contains at least one of the following materials: Al, Zn, Cu, Ag, Si, Cd, Ga, In, Tl, Sn, Pb, Bi, Po or the electrically conductive material comprises at least one binary eutectic system.

6. The method according to claim 5 , wherein, after curing, the electrically conductive material projects beyond the utility layer in a vertical direction.

7. The method according to claim 1 , wherein at least one polishing stop layer is applied at least in places to the outer surface of the utility layer facing away from the support body, and

wherein outer surfaces of the electrically conductive material facing away from the support body are free of the polishing stop layer at least in places and the polishing stop layer is formed with at least one of the following materials or contains at least one of the following materials: SiO 2 , Si 3 N 4 , SrO, HfO, HfO 2 , ZrO, ZrO 2 .

8. The method according to claim 7 , wherein, after applying at least one polishing step at least to the electrically conductive material, the electrically conductive material does not project beyond the polishing stop layer in a vertical direction.

9. The method according to claim 1 , wherein, after arranging the electrically conductive material, the support body is removed from the intermediate layer.

10. A method for producing an optoelectronic semiconductor component comprising the following steps:

providing an electrical terminal support produced by a method according to claim 1 ; and

arranging at least one optoelectronic semiconductor body on the outer surface of the utility layer, wherein the optoelectronic semiconductor body comprises at least one active zone suitable for generating or for detecting electromagnetic radiation, and is electrically conductively connected to the electrically conductive material.

11. The method according to claim 10 , wherein a further electrically conductive material penetrates through the active zone of the optoelectronic semiconductor body and a doped region of the optoelectronic semiconductor body is electrically conductively connected to the electrically conductive material of the electrical terminal support.

12. The method according to claim 1 , wherein the process of electrically insulating side surfaces of the openings and the outer surface of the utility layer is carried out by heating, such that the material of the utility layer is surface-oxidized.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2013
From: PLOESSL, ANDREAS
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 031206/0610 →