IP Library Granted Patent US 8,779,406
Granted Patent B2
US 8,779,406 · App. 14/006,424 · Granted Jul 15, 2014

Nonvolatile memory element and method for manufacturing the same

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Quick Facts
Patent No.
US 8,779,406
App. No.
14/006,424
Granted
Jul 15, 2014
Kind
B2
Abstract

A nonvolatile memory element includes a first electrode, a second electrode, and a variable resistance layer positioned between the first electrode and the second electrode. The variable resistance layer has a resistance state which reversibly changes based on an electrical signal applied between the first electrode and the second electrode. The variable resistance layer includes a first variable resistance layer having a first metal oxide and a second variable resistance layer having a second metal oxide. The second variable resistance layer includes a metal-metal bonding region including a metal bond of metal atoms included in the second metal oxide, and the second metal oxide has a low degree of oxygen deficiency and a high resistance value compared to the first metal oxide.

Claims (31)

1. A nonvolatile memory element comprising:

a first electrode;

a second electrode; and

a variable resistance layer which is positioned between the first electrode and the second electrode, the variable resistance layer having a resistance state which is configured to reversibly change based on an electrical signal applied between the first electrode and the second electrode,

wherein the variable resistance layer includes a first variable resistance layer comprising a first metal oxide and a second variable resistance layer comprising a second metal oxide, and the second variable resistance layer includes a metal-metal bonding region including a metal bond of metal atoms included in the second metal oxide, the second metal oxide having a low degree of oxygen deficiency and a high resistance value compared to the first metal oxide.

2. The nonvolatile memory element according to claim 1 ,

wherein in the variable resistance layer, the metal-metal bonding region is present at an interface between the second electrode and the second variable resistance layer.

3. The nonvolatile memory element according to claim 1 ,

wherein in the variable resistance layer, the metal-metal bonding region is present in the second variable resistance layer except on a surface of the second variable resistance layer.

4. The nonvolatile memory element according to claim 1 ,

wherein the metal-metal bonding region is present in the second variable resistance layer near an interface between the second variable resistance layer and the second electrode, and

the second variable resistance layer has a degree of oxygen deficiency which gradually increases toward the second electrode.

5. The nonvolatile memory element according to claim 1 ,

wherein each of the first metal oxide, the second metal oxide, and the metal-metal bonding region comprises a transition metal oxide or an aluminum oxide.

6. The nonvolatile memory element according to claim 1 ,

wherein the first metal oxide, the second metal oxide, and the metal-metal bonding region comprise a material including tantalum, hathium, or zirconium.

7. The nonvolatile memory element according to claim 1 ,

wherein the second variable resistance layer comprises an insulator.

8. A method for manufacturing a nonvolatile memory element, comprising:

forming a first electrode layer;

forming, on the first electrode layer, a first variable resistance layer comprising a first metal oxide;

forming, on the first variable resistance layer, a second variable resistance layer which comprises a second metal oxide having a low degree of oxygen deficiency and a high resistance value compared to the first metal oxide;

forming, in the second variable resistance layer, a metal-metal bonding region including a metal bond of metal atoms included in the second metal oxide; and

forming a second electrode layer on the second variable resistance layer.

9. The method for manufacturing a nonvolatile memory element according to claim 8 ,

wherein in the forming of a metal-metal bonding region, oxygen is desorbed from the second variable resistance layer to form the metal-metal bonding region.

10. The method for manufacturing a nonvolatile memory element according to claim 9 ,

wherein in the forming of a second electrode layer, the second electrode layer is formed by sputtering, and

in the forming of a metal-metal bonding region, sputtering is performed using, as a target, a second electrode material included in the second electrode layer, with a film formation pressure lower than a film formation pressure for forming the second electrode layer.

11. The method for manufacturing a nonvolatile memory element according to claim 8 ,

wherein the forming of a second variable resistance layer includes (i) stacking the second metal oxide after the forming of a first variable resistance layer and (ii) stacking the second metal oxide after the forming of a metal-metal bonding region.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2014
From: ITO, SATORU; FUJII, SATORU; YONEDA, SHINICHI; MIKAWA, TAKUMI
To: PANASONIC CORPORATION
Reel/Frame 032140/0405 →