IP Library Granted Patent US 8,749,955
Granted Patent B2
US 8,749,955 · App. 14/009,328 · Granted Jun 10, 2014

Capacitor

Inventors: Mitsuru Iwai (Osaka, JP); Hiroki Kamiguchi (Osaka, JP); Akiyoshi Oshima (Osaka, JP); Yuta Moriura (Osaka, JP)
Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,749,955
App. No.
14/009,328
Granted
Jun 10, 2014
Kind
B2
Abstract

A capacitor comprising a capacitor element including a substrate having first and second faces, a porous first rough surface layer formed on the first face and having pores, a first inner conductive polymer layer formed in the pores, a first outer conductive polymer layer formed on the inner conductive polymer layer, a porous second rough surface layer formed on the second face and having pores, a second inner conductive polymer layer formed in the pores, a second outer conductive polymer layer formed on the second inner conductive polymer layer, and a dielectric layer formed on surfaces of the first and the second rough surface layer. A surface area of the second rough surface layer is smaller than that of the first rough surface layer. The second outer conductive polymer layer is thicker than the first outer conductive polymer layer. This structure enables to eliminate warpage of a capacitor element.

Claims (27)

1. A capacitor comprising:

a substrate made of a valve metal, and having a first face and a second face confronting each other;

a porous first rough surface layer formed by depositing a valve metal on the first face and having pores on its outer surface and inside;

a first inner conductive polymer layer formed in the pores of the first rough surface layer;

a first outer conductive polymer layer formed on the outer surface of the first rough surface layer;

a second rough surface layer formed by depositing a valve metal on the second face and having pores on its outer surface and inside;

a second inner conductive polymer layer formed in the pores of the second rough surface layer;

a second outer conductive polymer layer formed on the outer surface of the second rough surface layer; and

a dielectric film formed on a surface of the first rough surface layer and a surface of the second rough surface layer,

wherein

a surface area of the second rough surface layer is smaller than a surface area of the first rough surface layer, and

the second outer conductive polymer layer is thicker than the first outer conductive polymer layer.

2. The capacitor of claim 1 ,

wherein

a surface area per unit volume of the second rough surface layer is smaller than a surface area per unit volume of the first rough surface layer.

3. The capacitor of claim 1 ,

wherein

the second rough surface layer is thinner than the first rough surface layer.

4. The capacitor of claim 1 ,

wherein

a ratio of the surface area of the second rough surface layer to the surface area of the first rough surface layer is not less than 1.05 and not greater than 2.0.

5. The capacitor of claim 1 ,

wherein

a ratio of a thickness of the first outer conductive polymer layer to a thickness of the second outer conductive polymer layer is not less than 1.05 and not greater than 3.5.

6. The capacitor of claim 1 ,

wherein

the surface areas per unit volume of the first rough surface layer and the second rough surface layer are both not less than 5×10 4 cm 2 /cm 3 and not greater than 30×10 4 cm 2 /cm 3 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2014
From: IWAI, MITSURU; KAMIGUCHI, HIROKI; OSHIMA, AKIYOSHI; MORIURA, YUTA
To: PANASONIC CORPORATION
Reel/Frame 032140/0345 →
Priority Claims (2)
JP 2011-259944 · Nov 29, 2011 · national
JP 2012-085401 · Apr 4, 2012 · national
Continuity (1)
Related Publication 20140133068A1 · May 15, 2014