IP Library Granted Patent US 9,651,596
Granted Patent B2
US 9,651,596 · App. 14/015,907 · Granted May 16, 2017

System and apparatus for measuring capacitance

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Quick Facts
Patent No.
US 9,651,596
App. No.
14/015,907
Granted
May 16, 2017
Kind
B2
Abstract

Systems and methods for determining a capacitance on a device-under-test (“DUT”). An example implementation includes a voltage signal generator that generates a voltage signal alternating between a high voltage and a low voltage at regular time intervals. The voltage signal generator causes a DUT current to flow in the DUT. The DUT current comprises a leakage current and a capacitance measurement current in response to the voltage signal. A current signal generator receives the DUT current from the DUT. The current signal generator generates a cancellation current signal alternating between high and low values at the regular time intervals of the voltage signal such that the cancellation current signal cancels the leakage current through the DUT. A signal measurement circuit receives the capacitance measurement current remaining after the leakage current is canceled to generate an output voltage having an output voltage value used to determine a capacitance of the DUT.

Claims (16)

1. A circuit for determining a capacitance on a device-under-test (“DUT”) comprising:

a voltage signal generator that generates a voltage signal alternating between a high voltage and a low voltage at regular time intervals, where the voltage signal generator is disposed in the circuit so as to generate the voltage signal to cause a DUT current to flow in the DUT, the DUT current comprising a leakage current and a capacitance measurement current in response to the voltage signal;

a current signal generator connected to receive the DUT current from the DUT, the current signal generator configured to generate a cancellation current signal alternating between high and low values at the regular time intervals of the voltage signal such that the cancellation current signal cancels the leakage current through the DUT; and

a signal measurement circuit configured to receive the capacitance measurement current remaining after the leakage current is canceled to generate an output voltage having an output voltage value used to determine a capacitance, C p , of the DUT.

2. The circuit of claim 1 where:

the current signal generator is implemented using a current source.

3. The circuit of claim 1 where:

a first connector to the DUT is connected to receive the voltage signal alternating between the high voltage and the low voltage from the voltage signal generator;

the signal measurement circuit includes an inverting input connected to a second connector to the DUT and to the current signal generator; and

the signal measurement circuit includes a non-inverting input connected to ground.

4. A method for measuring capacitance on a device-under-test (“DUT”), the method comprising:

generating a voltage signal alternating between a high voltage and a low voltage to cause a DUT current to flow, the DUT current comprising a capacitance measurement current and a leakage current; and

generating a cancellation current signal at a measurement node connected to receive the capacitance measurement current and the leakage current, the measurement node connected to an input of a signal measurement circuit to measure a current level from the measurement node, the cancellation current signal alternating between a high current level and a low current level being generated at a high cancellation current level and a low cancellation current level in a direction that substantially cancels the leakage current at the measurement node.

5. The method of claim 4 further comprising:

retrieving a device characteristics record comprising device characteristics of the DUT including leakage current characteristics from a data storage component; and

calculating values for the cancellation current signal according to leakage current characteristics of the DUT.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2014
From: AGILENT TECHNOLOGIES, INC.
To: KEYSIGHT TECHNOLOGIES, INC.
Reel/Frame 033746/0714 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2013
From: NADA, HIROSHI; TAKANO, KENICHI
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 031121/0808 →