Highly-spectrally-efficient receiver
A receiver may be operable to receive a QAM-based, inter-symbol correlated (ISC) signal having pilot overhead of 5% at a signal-to-noise ratio (SNR). The receiver may be operable to process the QAM-based, ISC signal to output information at a particular rate with a symbol error rate lower than or equal to 1e−2. The first SNR may be at least 3 dB below a SNR required to achieve the same particular information rate and the same symbol error rate while processing a signal having zero inter-symbol interference.
1. A system comprising:
circuitry for use in an electronic receiver, said circuitry being operable to:
receive an inter-symbol correlated (ISC) signal having the following characteristics:
said ISC signal is distorted by a particular non-linear distortion;
said ISC signal was generated using a forward error correction (FEC) code rate of approximately 0.94;
said ISC signal has a bandwidth of 28 MHz;
said ISC signal comprises 5% pilot symbols and has a net spectral efficiency of 9 bits per second per Hertz;
said ISC signal was transmitted in compliance with a spectral mask having an attenuation characteristic that:
is +2 dB from 0 MHz to 12 MHz;
decreases linearly from +2 dB at 12 MHz from a channel center frequency to −10 dB at 14.5 MHz from the channel center frequency;
decreases linearly from −10 dB at 14.5 MHz from the channel center frequency to −32 dB at 15.5 MHz from the channel center frequency;
decreases linearly from −32 dB at 15.5 MHz from the channel center frequency to −36 dB at 17 MHz from the channel center frequency;
decreases linearly from −36 dB at 17 MHz from the channel center frequency to −45 dB at 40 MHz from the channel center frequency; and
decreases linearly from −45 dB at 40 MHz from the channel center frequency to −55 dB at 50 MHz from the channel center frequency;
said ISC signal is received with a signal to noise ratio of 32 dB; and
decode and demodulate said received ISC signal using a model of said particular non-linear distortion to achieve a symbol error rate (SER) of less than 10-2 and/or a bit error rate of less than 10 −6 .
2. The system of claim 1 , wherein said particular non-linear distortion includes single side band (SSB) phase noise of −90 dBc per Hertz at a frequency offset of 100 kHz and having a fixed slope of −20 dB per decade.
3. The system of claim 1 , wherein said model of said particular non-linear distortion is memory-less.
4. The system of claim 1 , wherein said ISC signal was generated using Quadrature Amplitude Modulation.
5. The system of claim 4 , wherein said ISC signal was generated using a symbol constellation having fewer than 1024 points.
6. The system of claim 4 , wherein said ISC signal was generated using a symbol constellation having 32 points.
7. The system of claim 1 , wherein:
said circuitry comprises a pulse shaping filter having a response that is not a root-raised cosine response; and
said reception of said ISC signal is via said pulse shaping filter.
8. The system of claim 1 , wherein;
said circuitry comprises a sequence estimation circuit; and
said sequence estimation circuit is operable to process said ISC signal to generate estimated symbols.
9. The system of claim 8 , wherein said circuitry is operable to apply said model of said particular non-linear distortion to said estimated symbols to generate an ISC feedback signal.
10. The system of claim 9 , wherein said circuitry is operable to equalize said ISC signal based on said ISC feedback signal.
11. The system of claim 8 , wherein:
said sequence estimation circuit is operable to generate per-bit log-likelihood ratios; and
said log-likelihood ratios are used for forward error correction decoding of said received ISC signal.
12. The system of claim 1 , wherein said sequence estimation circuit is operable to concurrently generate phase candidate vectors and symbol candidate vectors.
13. The system of claim 1 , wherein said circuitry comprises an input filter, a timing pilot removal circuit an equalizer, a sequence estimation circuit, and a de-mapper.
14. The system of claim 13 , wherein a response of said input filter is substantially different from a response of a root-raised cosine filter.
15. The system of claim 13 , wherein said sequence estimation circuit uses said model of said particular non-linear distortion in estimating a symbol sequence of said ISC signal.
16. The system of claim 1 , wherein said model of said particular non-linear distortion is dynamically adapted during operation of said electronic receiver.
17. The system of claim 16 , wherein said per-bit log-likelihood ratios are generated based on a sliding window histogram over survivor vectors generated.