IP Library Granted Patent US 9,466,236
Granted Patent B2
US 9,466,236 · App. 14/017,290 · Granted Oct 11, 2016

Dithering to avoid pixel value conversion errors

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Quick Facts
Patent No.
US 9,466,236
App. No.
14/017,290
Granted
Oct 11, 2016
Kind
B2
Abstract

Embodiments of the present invention generally provide a method for processing an image. The method includes receiving a plurality of input pixel values associated with a video frame and determining that a first portion of pixel values included in the plurality of input pixel values is within a first set of excluded values. The method further includes dithering the first portion of pixel values to generate a first plurality of dithered values. Each dithered value included in the first plurality of dithered values is not within the first set of excluded values. Additionally, a first average pixel value associated with the plurality of input pixel values is substantially similar to a second average pixel value associated with both the first plurality of dithered values and a plurality of pixel values that are spatially proximate to the first plurality of dithered values.

Claims (31)

1. A method for processing an image, the method comprising:

receiving a plurality of input pixel values associated with a video;

determining that a first portion of pixel values included in the plurality of input pixel values is within a first set of excluded values; and

dithering the first portion of pixel values to generate a first plurality of dithered values, wherein each dithered value included in the first plurality of dithered values is not within the first set of excluded values, and a first average pixel value associated with the plurality of input pixel values is substantially similar to a second average pixel value associated with both the first plurality of dithered values and a plurality of pixel values that are spatially proximate to the first plurality of dithered values, wherein the first set of excluded values is associated with perturbations in a pixel value mapping that maps gray level values to values selected from the group consisting of voltage values, electrical current values, and electrical charge values.

2. The method of claim 1 , wherein the first set of excluded values comprises one or more ranges of contiguous values.

3. The method of claim 1 , wherein dithering of the input pixel values is performed based on at least one of a spatial dither pattern, a temporal dither pattern, and a spatiotemporal dither pattern.

4. The method of claim 1 , further comprising dithering a second portion of pixel values included in the plurality of input pixel values to generate the plurality of pixel values that are spatially proximate to the first plurality of dithered values, wherein each pixel value included in the plurality of pixel values that are spatially proximate to the first plurality of dithered values is not within the first set of excluded values.

5. The method of claim 1 , further comprising:

determining that a second portion of pixel values included in the plurality of input pixel values is within a second set of excluded values, wherein the first set of excluded values is associated with a first color channel and the second set of excluded values is associated with a second color channel; and

dithering the second portion of pixel values to generate a second plurality of dithered values, wherein each dithered value included in the second plurality of dithered values is not within the second set of excluded values.

6. The method of claim 1 , further comprising dithering a second portion of pixel values included in the plurality of input pixel values to generate a second plurality of dithered values, wherein each dithered value included in the second plurality of dithered values is not within the second set of excluded values, and the first portion of pixel values and the second portion of pixel values correspond to substantially all of the input pixel values included in the video frame.

7. The method of claim 1 , wherein:

receiving the plurality of input pixel values associated with a video frame comprises receiving a plurality of input pixel values associated with a video frame for display on a display unit; and

the method further comprises substituting the first portion of pixel values with the first plurality of dithered values for display on the display unit.

8. A processing system for a display device, the processing system comprising:

a display circuit configured to:

receive a plurality of input pixel values associated with a video frame; and

determine that a first portion of pixel values included in the plurality of input pixel values is within a first set of excluded values; and

a dithering circuit configured to dither the first portion of pixel values to generate a first plurality of dithered values, wherein each dithered value included in the first plurality of dithered values is not within the first set of excluded values, and a first average pixel value associated with the plurality of input pixel values is substantially similar to a second average pixel value associated with both the first plurality of dithered values and a plurality of pixel values that are spatially proximate to the first plurality of dithered values, wherein the first set of excluded values is associated with perturbations in a pixel value mapping that maps gray level values to values selected from the group consisting of voltage values, electrical current values, and electrical charge values.

9. The processing system of claim 8 , wherein the first set of excluded values comprises one or more ranges of contiguous values.

10. The processing system of claim 8 , wherein dithering of the input pixel values is performed based on at least one of a spatial dither pattern, a temporal dither pattern, and a spatiotemporal dither pattern.

11. The processing system of claim 8 , further comprising dithering a second portion of pixel values included in the plurality of input pixel values to generate the plurality of pixel values that are spatially proximate to the first plurality of dithered values, wherein each pixel value included in the plurality of pixel values that are spatially proximate to the first plurality of dithered values is not within the first set of excluded values.

12. The processing system of claim 8 , wherein:

the display circuit is further configured to determine that a second portion of pixel values included in the plurality of input pixel values is within a second set of excluded values, wherein the first set of excluded values is associated with a first color channel and the second set of excluded values is associated with a second color channel; and

the dithering circuit is further configured to dither the second portion of pixel values to generate a second plurality of dithered values, wherein each dithered value included in the second plurality of dithered values is not within the second set of excluded values.

13. An electronic device, the electronic device comprising:

a display device; and

a processing system coupled to the display device, the processing system configured to:

receive a plurality of input pixel values associated with a video frame;

determine that a first portion of pixel values included in the plurality of input pixel values is within a first set of excluded values; and

dither the first portion of pixel values to generate a first plurality of dithered values, wherein each dithered value included in the first plurality of dithered values is not within the first set of excluded values, and a first average pixel value associated with the plurality of input pixel values is substantially similar to a second average pixel value associated with both the first plurality of dithered values and a plurality of pixel values that are spatially proximate to the first plurality of dithered values, wherein the first set of excluded values is associated with perturbations in a pixel value mapping that maps gray level values to values selected from the group consisting of voltage values, electrical current values, and electrical charge values.

Assignments (3)
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
SECURITY INTEREST Recorded Oct 3, 2014
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 033889/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2013
From: SMALL, JEFFREY A.
To: SYNAPTICS INCORPORATED
Reel/Frame 031130/0241 →