INTEGRATING A CAPACITOR IN AN INTEGRATED CIRCUIT
In one aspect, an integrated circuit (IC) includes an isolation trench dividing the IC into a first section and a second section, an active electronic device disposed in the first section of the IC and a capacitor disposed in the second section of the IC and electrically isolated from the active electronic device.
1 . An integrated circuit (IC) comprising;
an isolation trench dividing the IC into a first section and a second section;
an active electronic device disposed in the first section of the IC; and
a capacitor disposed in the second section of the IC and electrically isolated from the active electronic device.
2 . The IC of claim 1 wherein the capacitor has a capacitance greater than 100 nF.
3 . The IC of claim 1 wherein the capacitor comprises a plurality of trenches.
4 . The IC of claim 3 wherein the capacitor comprises a conductive material and a dielectric material disposed on the conductive material.
5 . The IC of claim 4 wherein the conductive material is configured to be one of two capacitor plates.
6 . The IC of claim 5 wherein the capacitor further comprises a metal disposed on the dielectric material.
7 . The IC of claim 6 wherein the metal is configured to be the other one of the two capacitor plates.
8 . The IC of claim 4 wherein the conductive material comprises silicide comprising at least one of titanium silicide (TiSi 2 ), tantalum silicide (TaSi 2 ), nickel suicide (NiSi x ), tungsten silicide (WSi x ), Molybdenum silicide or platinum silicide (PtSi x ).
9 . The IC of claim 4 wherein the dielectric material comprises at least one of tungsten oxide (TaO x ), titanium oxide (TiO), titanium oxynitride (TiO x N y ), silicon oxide (SiO y ), silicon nitride (Si x N y ), silicon oxynitride (Si x O y N z ) or hafnium oxide (HfO x ).
10 . The IC of claim 1 further comprising
a first contact disposed on a top surface of the IC and having an electrical connection to one of two capacitor plates; and
a second contact disposed on the top surface of the IC and having an electrical connection to the other one of the two capacitor plates.
11 . The IC of claim 1 , further comprising a silicon oxide in contact with the isolation trench.
12 . The IC of claim 1 , wherein the active electronic device comprises one or more of an amplifier or a magnetic field sensing element.
13 . A method to fabricate a capacitor in an integrated circuit (IC), comprising:
providing a preliminary structure having an isolation trench dividing the structure into a first section and a second section, the first section comprising an active electronic device;
forming a plurality of trenches into an epitaxial silicon in the second section;
disposing a conductive material within the trenches;
disposing a dielectric material on the conductive material, the conductive material forming a bottom plate of a capacitor; and
disposing a metal on the dielectric material, the metal forming a top plate of the capacitor.
14 . The method of claim 13 wherein forming the plurality of trenches comprises using a pattern and etch process to form the trenches.
15 . The method of claim 13 wherein disposing the conductive material within the trenches comprises disposing a silicide.
16 . The method of claim 15 wherein disposing the suicide comprises disposing at least one of titanium silicide (TiSi 2 ), tantalum silicide (TaSi 2 ), nickel silicide (NiSi x ), tungsten silicide (WSi x ), Molybdenum suicide or platinum suicide (PtSi x ),
17 . The method of claim 15 wherein disposing the silicide comprises:
depositing at least one of titanium (Ti), tungsten (Ta), nickel (Ni) or platinum (Pt) into the trenches;
annealing at a temperature ranging from about 580° C. to about 750° C.
performing a wet etch with one or more of hydrogen peroxide (H 2 O 2 ), ammonium hydroxide (NH 4 OH) and water (H 2 O); and
annealing at a temperature ranging from about 900° C. to about 100° C.
18 . The method of claim 13 wherein disposing the dielectric material on the conductive material comprises disposing at least one of tungsten oxide (TaO x ), titanium oxide (TiO), titanium oxynitride (TiO x N y ), silicon oxide (SiO y ), silicon nitride (Si x N y ), silicon oxynitride (Si x O y N z ) or hafnium oxide (HfO x ).
19 . The method of claim 13 wherein disposing the dielectric material on the silicide comprises depositing the dielectric material using one of a chemical vapor deposition (CVD) process, a sputtering process or a spin-on process.
20 . The method of claim 13 , further comprising:
removing a portion of the metal; and
disposing a second dielectric material on the metal.
21 . The method of claim 13 , further comprising:
forming a first interconnect to form an electrical connection between the bottom plate of the capacitor and a first metal contact disposed on an exterior of the IC;
forming a second interconnect to form an electrical connection between the top plate of the capacitor and a second metal contact disposed on an exterior of the IC; and
forming a third interconnect to form an electrical connection between the active electric device and a third metal contact disposed on an exterior of the IC.
22 . An integrated circuit (IC) sensor comprising:
an IC having a first surface and a second, opposing surface and comprising:
an isolation trench dividing the IC into a first section and a second section;
an active electronic device disposed in the first section of the IC; and
a capacitor disposed in the second section of the IC and electrically isolated from the active electronic device; and
a lead frame having a die attach area to which the IC is attached.
23 . The IC sensor of claim 22 , wherein tie active electronic device comprises a magnetic field sensing element.
24 . The IC sensor of claim 22 wherein the first surface of the IC is attached to the die attach area.
25 . The IC sensor of claim 22 wherein the second surface of the IC is attached to the die attach area.
26 . The IC sensor of claim 22 , further comprising a mold material to enclose the IC and a portion of the lead frame.