Semiconductor integrated circuit

1. A semiconductor integrated circuit comprising a logic circuit including n storage elements (n is a positive integer) which can each store 1-bit information and an attack detection circuit,

the attack detection circuit comprising:

an error determination circuit which can detect through a logic operation that k-bit or less errors (k is a positive integer) have occurred in n-bit codes stored in the n storage elements; and

a light irradiation detection circuit which has light detection elements and can detect that light has been irradiated to (k+1) or more of the n storage elements,

wherein it is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.

2. The semiconductor integrated circuit according to claim 1 ,

wherein the n storage elements include m storage elements which can store m-bit error detection codes, and

wherein the error determination circuit comprises an error detection code generation circuit for generating an error detection code from (n−m) storage elements of the n storage elements and a check circuit which can detect occurrence of an error in the n storage elements.

3. The semiconductor integrated circuit according to claim 2 ,

wherein the n storage elements include one storage element which can store a 1-bit parity code and the light irradiation detection circuit has (n−1) light detection elements,

wherein the error determination circuit comprises a parity code generation circuit for generating the parity code from (n−1) storage elements of the n storage elements and a parity check circuit which can detect occurrence of an error in the n storage elements, and

wherein the light irradiation detection circuit detects occurrence of an error for detecting that light has been irradiated to two or more of the n storage elements at the time of detecting that light has been irradiated to at least one of the (n−1) light detection elements.

4. The semiconductor integrated circuit according to claim 3 , wherein arbitrary two storage elements selected from the n storage elements are necessarily disposed with at least one light detection element interposed therebetween.

5. The semiconductor integrated circuit according to claim 4 , wherein the (n−1) light detection elements and the n storage elements are each alternately adjacently disposed in a single cell row.

6. The semiconductor integrated circuit according to claim 1 ,

wherein the n storage elements comprise m active storage elements which are outputs of an active logic circuit and m backup storage elements which are outputs of a backup logic circuit duplexed with the active circuit,

wherein the error determination circuit detects that an error has occurred if an output of an active storage element does not match an output of a corresponding backup storage element, and

wherein in the active storage elements and the corresponding backup storage elements, corresponding two storage elements are disposed with at least one light detection element interposed therebetween.

7. The semiconductor integrated circuit according to claim 1 ,

wherein the logic circuit is a processor, and

wherein the n storage elements comprise a program counter of the processor.

8. The semiconductor integrated circuit according to claim 1 ,

wherein the logic circuit is a processor, and

wherein the n storage elements comprise a register for providing a condition to which the processor refers at the time of executing a conditional branch instruction.

9. The semiconductor integrated circuit according to claim 1 ,

wherein the logic circuit is a processor, and

wherein the n storage elements comprise a general-purpose register of the processor.

10. The semiconductor integrated circuit according to claim 1 ,

wherein the logic circuit is a processor, and

wherein an output of the attack detection circuit is inputted to a reset terminal of the processor.

11. The semiconductor integrated circuit according to claim 1 ,

wherein the logic circuit is a processor having a memory,

wherein the attack detection circuit can generate an interrupt to the processor, and

wherein the processor deletes information stored in the memory upon detecting the attack.

12. The semiconductor integrated circuit according to claim 1 , further comprising a power supply circuit having a power supply control terminal for controlling power supply to the logic circuit,

wherein an output of the attack detection circuit is coupled to the power supply control terminal of the power supply circuit, and the power supply to the logic circuit is shut off upon detecting the attack.

13. A semiconductor integrated circuit comprising a logic circuit including n storage elements (n is a positive integer) which can each store 1-bit information and an attack detection circuit,

the attack detection circuit comprising an error determination circuit and a light irradiation detection circuit having light detection elements,

wherein the error determination circuit can detect through a logic operation that k-bit or less errors (k is a positive integer) have occurred in n-bit codes stored in the n storage elements,

wherein a plurality of areas surrounding arbitrary (k+1) storage elements of the n storage elements, with a minimum closed curve having no inward convex circumference, each contain at least one light detection element, and the light irradiation detection circuit detects light irradiation to (k+1) or more of the n storage elements at the time of detecting that light has been irradiated to at least one of the light detection elements, and

wherein it is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.