Variable resistance nonvolatile storage device and method of forming memory cell

1. A variable resistance nonvolatile storage device comprising:

a semiconductor substrate;

a variable resistance element including: a first electrode; a second electrode; and a variable resistance layer which is provided between said first and second electrodes and in contact with said first and second electrodes and which has a resistance value that reversibly varies based on voltage signals each of which has a different polarity and is applied between said first and second electrodes; and

an N-type MOS transistor formed on a main surface of said semiconductor substrate, said N-type MOS transistor including: a first N-type diffusion layer region; a gate; and a second N-type diffusion layer region formed on a side of said gate opposite said first N-type diffusion layer region,

wherein said variable resistance layer includes: a first transition metal oxide layer which is in contact with said first electrode; and a second transition metal oxide layer which is in contact with said second electrode,

wherein said second transition metal oxide layer has a higher resistance value than a resistance value of said first transition metal oxide layer,

wherein said first N-type diffusion layer region of said N-type MOS transistor is connected with said first electrode included in said variable resistance element to form a memory cell, so that a substrate bias effect in said N-type MOS transistor is smaller when one of the voltage signals having a polarity that causes a resistance change to high resistance state in said variable resistance layer is applied to said N-type MOS transistor and said variable resistance element, than when another one of the voltage signals having a polarity that causes a resistance change to low resistance state in said variable resistance layer is applied to said N-type MOS transistor and said variable resistance element,

wherein said first transition metal oxide layer comprises an oxide of a first transition metal, said second transition metal oxide layer comprises an oxide of a second transition metal, and the first transition metal and the second transition metal are different in type from each other, and

wherein said first transition metal oxide layer of said variable resistance element and said first electrode of said variable resistance element are each connected between said first N-type diffusion layer region and said second transition metal oxide layer of said variable resistance element.

2. The variable resistance nonvolatile storage device according to claim 1 ,

wherein in said variable resistance layer, an oxygen content percentage of each of said transition metal oxide layers is determined to make the resistance value of said second transition metal oxide layer higher than the resistance value of said first transition metal oxide layer.

3. A variable resistance nonvolatile storage device comprising:

a semiconductor substrate;

a variable resistance element including: a first electrode; a second electrode; and a variable resistance layer which is provided between said first and second electrodes and in contact with said first and second electrodes and which has a resistance value that reversibly varies based on voltage signals each of which has a different polarity and is applied between said first and second electrodes; and

a P-type MOS transistor formed on a main surface of said semiconductor substrate, said P-type MOS transistor including: a first P-type diffusion layer region; a gate; and a second P-type diffusion layer region formed on a side of said gate opposite said first P-type diffusion layer region,

wherein said variable resistance layer includes: a first transition metal oxide layer which is in contact with said first electrode; and a second transition metal oxide layer which is in contact with said second electrode,

wherein said second transition metal oxide layer has a higher resistance value than a resistance value of said first transition metal oxide layer,

wherein said first P-type diffusion layer region of said P-type MOS transistor is connected with said second electrode included in said variable resistance element to form a memory cell, so that a substrate bias effect in said P-type MOS transistor is smaller when one of the voltage signals having a polarity that causes a resistance change to high resistance state in said variable resistance layer is applied to said P-type MOS transistor and said variable resistance element, than when another one of the voltage signals having a polarity that causes a resistance change to low resistance state in said variable resistance layer is applied to said P-type MOS transistor and said variable resistance element,

wherein said first transition metal oxide layer comprises an oxide of a first transition metal, said second transition metal oxide layer comprises an oxide of a second transition metal, and the first transition metal and the second transition metal are different in type from each other, and

wherein said second transition metal oxide layer of said variable resistance element and said second electrode of said variable resistance element are each connected between said first P-type diffusion layer region and said first transition metal oxide layer of said variable resistance element.

4. The variable resistance nonvolatile storage device according to claim 3 ,

wherein in said variable resistance layer, an oxygen content percentage of each of said transition metal oxide layers is determined to make the resistance value of said second transition metal oxide layer higher than the resistance value of said first transition metal oxide layer.