Mixer biasing for intermodulation distortion compensation

1. A method of compensating a receiver for intermodulation distortion, the method comprising:

mixing, by downconverting mixers, an RF signal with a biasing differential to generate a baseband signal;

determining intermodulation distortion compensation weights based on the baseband signal; and

generating a voltage to apply as the biasing differential based on the determined intermodulation distortion compensation weights wherein the biasing differential is applied across the downconverting mixers in the receiver to minimize cross-correlation of quadrature signal components of the RF signal produced by the receiver in the presence of a blocking signal.

2. The method of claim 1 , further comprising:

determining whether the blocking signal is present at the receiver;

computing the cross-correlation of the quadrature signal components concurrently with the biasing differential applied across the downconverting mixers responsive to determining that the blocking signal is present at the receiver;

determining another biasing differential that minimizes the cross-correlation of the quadrature signal components responsive to determining that the computed cross-correlation is not minimized; and

applying the another biasing differential across the downconverting mixers.

3. The method of claim 2 , wherein determining whether the blocking signal is present comprises:

measuring signal strength of a signal present at the receiver; and

affirming the presence of the blocking signal when the measured signal strength meets a blocking signal induced intermodulation distortion condition.

4. The method of claim 3 , wherein affirming the presence of the blocking signal comprises:

affirming the presence of the blocking signal when the measured signal strength exceeds a signal strength threshold above which the blocking signal induced intermodulation distortion condition is measurable above a noise floor of the receiver.

5. The method of claim 1 , wherein applying the biasing differential comprises:

incrementing, in successive iterations, a candidate biasing differential;

applying, in respective iterations, the candidate biasing differential across the mixers;

computing, in the respective iterations, the cross-correlation of the quadrature signal components in response to the applied candidate biasing differential;

terminating the incrementing of the candidate biasing differential in response to a determination that the computed cross-correlation is minimized; and

applying the candidate biasing differential corresponding to the minimized computed cross-correlation as the biasing differential.

6. The method of claim 5 , wherein incrementing the candidate biasing differential comprises:

incrementing, in the respective iterations, the candidate biasing differential in a steepest descent sense towards the biasing differential.

7. The method of claim 5 , further comprising:

applying, as a first candidate biasing differential, the biasing differential that minimizes the cross-correlation of the quadrature signal components of another signal produced by the receiver in the absence of the blocking signal.

8. The method of claim 7 , wherein applying the first candidate biasing differential comprises:

retrieving from a memory in-phase and quadrature phase imbalance calibration weights; and

determining the first candidate biasing differential from the retrieved in-phase and quadrature phase imbalance calibration weights.

9. A receiver having downconverting mixers in a receiver signal processing chain, the receiver comprising:

the downconverting mixers configured to mix an RF signal with a biasing differential to generate a baseband signal;

a processor configured to determine intermodulation distortion compensation weights to minimize cross-correlation of quadrature signal components of the RF signal produced by the receiver in the presence of a blocking signal; and

a circuit configured to generate a voltage to apply as the biasing differential across the downconverting mixers based on the determined intermodulation distortion compensation weights.

10. The receiver of claim 9 , wherein the processor is further configured to:

determine whether the blocking signal is present at the receiver;

compute the cross-correlation of the quadrature signal components in response to the determination that the blocking signal is present concurrently with the biasing differential applied across the downconverting mixers;

determine other intermodulation distortion compensation weights, in response to a determination that the computed cross-correlation is not minimized, that, when provided to the circuit that generates the voltage, produces the biasing differential that minimizes the cross-correlation of the quadrature signal components; and

provide the other intermodulation distortion compensation weights to the circuit that generates the voltage.

11. The receiver of claim 10 , further comprising:

a signal strength measuring device configured to measure signal strength of a signal present at the receiver; and wherein

the processor is further configured to affirm the presence of the blocking signal when the measured signal strength meets a blocking signal induced intermodulation distortion condition.

12. The receiver of claim 11 , wherein the blocking signal induced intermodulation distortion condition is met when the measured signal strength exceeds a signal strength threshold above which the blocking signal induced intermodulation distortion condition is measurable above a noise floor of the receiver.

13. The receiver of claim 9 , wherein the processor determines the intermodulation distortion compensation weights by:

incrementing, in successive iterations, candidate intermodulation distortion compensation weights that, when provided to the circuit that generates the voltage, a candidate biasing differential is applied across the mixers;

providing, in respective iterations, the candidate intermodulation distortion compensation weights to the circuit that generates the voltage;

computing, in the respective iterations, the cross-correlation of the quadrature signal components in response to the applied candidate biasing differential;

terminating the incrementing of the candidate intermodulation distortion compensation weights in response to a determination that the computed cross-correlation is minimized; and

storing the candidate intermodulation distortion compensation weights corresponding to the biasing differential for which the computed cross-correlation is minimized as the intermodulation distortion compensation weights.

14. The receiver of claim 13 , wherein the processor increments the candidate intermodulation distortion compensation weights in a steepest descent sense towards the biasing differential.

15. The receiver of claim 13 , wherein the processor applies, as first candidate intermodulation distortion compensation weights, the intermodulation distortion compensation weights that minimize the cross-correlation of the quadrature signal components of another signal produced by the receiver in the absence of the blocking signal.

16. The receiver of claim 15 , wherein the processor is further configured to:

retrieve from a memory in-phase and quadrature phase imbalance calibration weights; and

determine the first candidate intermodulation distortion compensation weights from the retrieved in-phase and quadrature phase imbalance calibration weights.