IP Library Granted Patent US 9,159,917
Granted Patent B2
US 9,159,917 · App. 14/023,860 · Granted Oct 13, 2015

Nonvolatile memory element and method of manufacturing nonvolatile memory element

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Quick Facts
Patent No.
US 9,159,917
App. No.
14/023,860
Granted
Oct 13, 2015
Kind
B2
Abstract

A nonvolatile memory element includes: a first electrode; a second electrode; and a variable resistance layer between the first and second electrodes. The variable resistance layer having a resistance value that reversibly changes according to an electrical signal provided between the electrodes. The variable resistance layer includes a first variable resistance layer and a second variable resistance layer. The first variable resistance layer comprises a first metal oxide. The second variable resistance layer is planar and includes a first part and a second part. The first part comprises a second metal oxide and is planar. The second part comprises an insulator and is planar. The second metal oxide has a lower oxygen deficient degree than that of the first metal oxide. The first and second parts are in contact with different parts of a main surface of the first variable resistance layer which faces the second variable resistance layer.

Claims (29)

1. A nonvolatile memory element, comprising:

a first electrode;

a second electrode; and

a variable resistance layer between the first electrode and the second electrode, the variable resistance layer having a resistance value that reversibly changes according to an electrical signal applied between the first electrode and the second electrode,

wherein the variable resistance layer includes at least a first variable resistance layer and a second variable resistance layer,

the first variable resistance layer comprises a first metal oxide,

the second variable resistance layer is planar and includes a first part and a second part, the first part comprising a second metal oxide and being planar, and the second part comprising an insulator and being planar,

the second metal oxide has a lower oxygen deficient degree than an oxygen deficient degree of the first metal oxide, and

the first part and the second part of the second variable resistance layer are in contact with different parts of a main surface of the first variable resistance layer, the main surface facing the second variable resistance layer.

2. The nonvolatile memory element according to claim 1 ,

wherein the second variable resistance layer has a thickness in a range from 3 nm to 10 nm inclusive.

3. The nonvolatile memory element according to claim 1 ,

wherein the first part and the second part of the second variable resistance layer are in contact with different parts of a main surface of the second electrode, the main surface facing the second variable resistance layer.

4. The nonvolatile memory element according to claim 1 ,

wherein the first part of the second variable resistance layer does not include side surfaces of the second variable resistance layer, and the second part of the second variable resistance layer includes the side surfaces of the second variable resistance layer.

5. The nonvolatile memory element according to claim 1 ,

wherein the insulator is one of an oxide, a nitride, and an oxynitride.

6. The nonvolatile memory element according to claim 1 ,

wherein each of the first metal oxide and the second metal oxide is one of a tantalum oxide, a hafnium oxide, and a zirconium oxide.

7. The nonvolatile memory element according to claim 1 ,

wherein the second metal oxide includes a local region having an oxygen deficient degree that reversibly changes according to an applied electric pulse.

8. The nonvolatile memory element according to claim 1 ,

wherein a size of the first part is no larger than a half of a size of the second variable resistance layer in length.

9. The nonvolatile memory element according to claim 1 , further comprising

an insulation layer in which the first electrode, the second electrode, and the variable resistance layer are embedded, the insulation layer comprising an insulator different from the insulator in the second part in the variable resistance layer.

10. The nonvolatile memory element according to claim 1 ,

wherein a first metal in the first metal oxide is same as a second metal in the second metal oxide.

11. The nonvolatile memory element according to claim 1 ,

wherein a first metal in the first metal oxide is different from a second metal in the second metal oxide.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2014
From: YONEDA, SHINICHI
To: PANASONIC CORPORATION
Reel/Frame 032512/0917 →