IP Library Granted Patent US 8,896,776
Granted Patent B2
US 8,896,776 · App. 14/024,704 · Granted Nov 25, 2014

Liquid crystal display device

Inventor: Hajime Kimura (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
G02F1/136213G09G3/3659G09G3/342G09G3/3655G09G3/3688G09G2300/0426G09G2300/0443G09G2300/0842G09G2300/0852G09G2310/024G09G2310/0251G09G2310/0297G09G2320/0238G09G2320/0252G09G2320/0257G09G2320/0261G09G2320/028G09G2340/02G09G2340/0435G09G2340/16
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,896,776
App. No.
14/024,704
Granted
Nov 25, 2014
Kind
B2
Abstract

The present invention has a pixel which includes a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.

Claims (88)

1. A display device comprising:

a scanning backlight including a diffusion plate and a light source; and

a pixel comprising:

a first transistor;

a second transistor;

a third transistor;

a first capacitor;

a second capacitor;

a third capacitor;

a first wiring;

a second wiring;

a third wiring;

a first liquid crystal element including a first pixel electrode; and

a second liquid crystal element including a second pixel electrode,

wherein on/off of the first transistor and on/off of the second transistor are controlled by a signal input to a scan line,

wherein the first capacitor serves to hold a voltage between a potential of the first wiring and a common potential supplied by a Cs line,

wherein the second capacitor serves to hold a voltage between a potential of the second wiring and the common potential,

wherein one of a source and a drain of the first transistor is in contact with the first wiring,

wherein the first pixel electrode is in contact with the first wiring,

wherein one of a source and a drain of the second transistor is in contact with the second wiring,

wherein the second pixel electrode is in contact with the second wiring,

wherein one of a source and a drain of the third transistor is in contact with the second wiring,

wherein the other of the source and the drain of the third transistor is in contact with the third wiring, and

wherein the first wiring is not overlapped with the second pixel electrode and the second wiring and the third wiring are not overlapped with the first pixel electrode.

2. The display device according to claim 1 , wherein on/off of the third transistor is controlled by the signal.

3. The display device according to claim 1 , wherein the common potential is supplied to the second wiring through both of the source and the drain of the first transistor.

4. The display device according to claim 1 , wherein the light source is an LED.

5. The display device according to claim 1 , wherein the light source is a cold cathode fluorescent lamp.

6. The display device according to claim 1 , wherein the other of the source and the drain of the second transistor is connected to a signal line.

7. The display device according to claim 6 ,

wherein the signal line is directly connected to the other of the source and the drain of the second transistor, and

wherein the signal line is not directly connected to the other of the source and the drain of the first transistor.

8. A display device comprising:

a driver circuit configured to perform double-frame rate driving; and

a pixel operationally connected to the driver circuit, the pixel comprising:

a first transistor;

a second transistor;

a third transistor;

a first capacitor;

a second capacitor;

a first wiring;

a second wiring;

a third wiring;

a first liquid crystal element including a first pixel electrode; and

a second liquid crystal element including a second pixel electrode,

wherein on/off of the first transistor and on/off of the second transistor are controlled by a signal input to a scan line,

wherein the first capacitor serves to hold a voltage between a potential of the first wiring and a common potential supplied by a Cs line,

wherein the second capacitor serves to hold a voltage between a potential of the second wiring and the common potential,

wherein one of a source and a drain of the first transistor is in contact with the first wiring,

wherein the first pixel electrode is in contact with the first wiring,

wherein one of a source and a drain of the second transistor is in contact with the second wiring,

wherein the second pixel electrode is in contact with the second wiring,

wherein one of a source and a drain of the third transistor is in contact with the second wiring,

wherein the other of the source and the drain of the third transistor is in contact with the third wiring, and

wherein the first wiring is not overlapped with the second pixel electrode and the second wiring and the third wiring are not overlapped with the first pixel electrode.

9. The display device according to claim 8 , wherein on/off of the third transistor is controlled by the signal.

10. The display device according to claim 8 , wherein the common potential is supplied to the second wiring through both of the source and the drain of the first transistor.

11. The display device according to claim 8 , wherein the other of the source and the drain of the second transistor is connected to a signal line.

12. The display device according to claim 11 ,

wherein the signal line is directly connected to the other of the source and the drain of the second transistor, and

wherein the signal line is not directly connected to the other of the source and the drain of the first transistor.

13. A display device comprising a pixel comprising:

a first transistor;

a second transistor;

a third transistor;

a first capacitor;

a second capacitor;

a first wiring;

a second wiring;

a third wiring;

a first liquid crystal element including a first pixel electrode; and

a second liquid crystal element including a second pixel electrode,

wherein on/off of the first transistor and on/off of the second transistor are controlled by a signal input to a scan line,

wherein the first capacitor serves to hold a voltage between a potential of the first wiring and a common potential supplied by a Cs line,

wherein the second capacitor serves to hold a voltage between a potential of the second wiring and the common potential,

wherein one of a source and a drain of the first transistor is in contact with the first wiring,

wherein the first pixel electrode is in contact with the first wiring,

wherein one of a source and a drain of the second transistor is in contact with the second wiring,

wherein the second pixel electrode is in contact with the second wiring,

wherein one of a source and a drain of the third transistor is in contact with the second wiring,

wherein the other of the source and the drain of the third transistor is in contact with the third wiring, and

wherein the first wiring is not overlapped with the second pixel electrode and the second wiring and the third wiring are not overlapped with the first pixel electrode.

14. The display device according to claim 13 , wherein on/off of the third transistor is controlled by the signal.

15. The display device according to claim 13 , wherein the common potential is supplied to the second wiring through both of the source and the drain of the first transistor.

16. The display device according to claim 13 , wherein the other of the source and the drain of the second transistor is connected to a signal line.

17. The display device according to claim 16 ,

wherein the signal line is directly connected to the other of the source and the drain of the second transistor, and

wherein the signal line is not directly connected to the other of the source and the drain of the first transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2014
From: KIMURA, HAJIME
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 032594/0717 →
Priority Claims (1)
JP 2007-132126 · May 17, 2007 · national
Continuity (4)
Division 13478176 · May 23, 2012
Division 13053323 · Mar 22, 2011
Continuation 12115887 · May 6, 2008
Related Publication 20140016053A1 · Jan 16, 2014