IP Library Granted Patent US 9,071,480
Granted Patent B2
US 9,071,480 · App. 14/033,818 · Granted Jun 30, 2015

Unified interference power estimation

Inventors: Hou-Shin Chen (San Diego, CA); Fu-Hsuan Chiu (Berkeley Heights, NJ)
Assignee: Broadcom Corporation
H04L25/03159
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Quick Facts
Patent No.
US 9,071,480
App. No.
14/033,818
Granted
Jun 30, 2015
Kind
B2
Abstract

A communication device, such as a smart phone, includes logic to determine a noise power estimate. In an example, a frequency domain calculation may be used to determine noise components within the noise power estimate. Further, a product of a channel estimate and equalizer effect may be used in the determination of the levels noise components, such as, inter-symbol interference power and neighbor cell interference power.

Claims (50)

1. A method, comprising;

at processing circuitry in a communication device:

determining a noise power estimate comprising multiple different noise components;

determining an inter-symbol interference power estimate based on a product of an estimated channel and an equalizer effect, the inter-symbol interference power estimate associated with a resolution of multiple samples per symbol sent by a first device via a physical channel; and

removing the inter-symbol interference power estimate from the noise power estimate.

2. The method of claim 1 , further comprising:

determining a neighbor-cell interference power estimate also based on the product of the estimated channel and the equalizer effect, the neighbor-cell interference power estimate being associated with a noise component generated via a second device different from the first device; and

removing the neighbor-cell interference power estimate from the noise power estimate.

3. The method of the claim 2 , where the generating of the neighbor-cell interference power estimate further comprises determining a function of a summation of the product.

4. The method of claim 3 , where the generating of the inter-symbol interference power estimate comprises determining the function of the summation of the product; and

the generating of the inter-symbol interference power estimate further comprises determining the summation of the function of the product.

5. The method of claim 1 , where determining the noise power comprises determining an interference-to-signal ratio associated with a received portion of a known signal.

6. The method of claim 1 , where determining the equalizer effect further comprises inverting the estimated channel to obtain the equalizer effect.

7. The method of claim 1 , further comprising transforming a time domain channel estimate to a frequency domain to obtain the estimate channel.

8. The method of claim 7 , further comprising decoding a portion of a known symbol sequence to obtain the time domain channel estimate.

9. The method of claim 8 , further comprising determining a signal-to-noise ratio based on the decoded portion to determine the noise power estimate.

10. The method of claim 1 , where generating the inter-symbol interference power estimate based on the product comprises; determining a ratio of the inter-symbol interference power estimate to a signal power.

11. A system, comprising:

channel estimator circuitry configured to:

determine a noise power estimate comprising multiple different noise components; and

determine an estimated channel for a physical channel associated with the noise power;

equalizer circuitry configured to invert the estimated channel configured to obtain an equalizer effect; and

processing circuitry in data communication with the channel estimator circuitry and the equalizer circuitry, the processing circuitry configured to:

determine an inter-symbol interference power estimate based on a product of the estimated channel and the equalizer effect, the inter-symbol interference power estimate being associated with a resolution of multiple symbols sent by a first device via the physical channel; and

remove the inter-symbol interference power estimate from the noise power estimate.

12. The system of claim 11 , where the processing circuitry is further configured to:

determine a neighbor cell neighbor-cell noise estimate also based on the product of the estimated channel and the equalizer effect, the neighbor-cell noise estimate being associated with a noise component generated via a second device different from the first device; and

remove the neighbor-cell noise estimate from the noise power estimate.

13. The system of claim 11 , where the equalizer circuitry comprises frequency domain equalizer (FDEQ) circuitry configured to perform the inversion in a frequency domain.

14. The system of claim 13 , where the FDEQ circuitry and the processing circuitry comprises a vector computational unit.

15. The system of claim 11 , where the channel estimator circuitry comprises decoder circuitry configured to decode a portion of a known sequence to obtain the estimated channel and the noise power estimate.

16. The system of claim 11 , further comprising a power sensor to determine a power output of the equalizer circuitry.

17. The system of claim 16 , where the processing circuitry is further configured to:

determine a signal power based on a difference of the power output and the noise power estimate; and

determine the inter-symbol interference power estimate based on a ratio of the signal power and an inter-symbol interference.

18. A device, comprising:

a receiver configured to receive an input signal;

decoder circuitry configured to decode a portion of a known symbol sequence from within the input signal;

channel estimator circuitry configured to determine an estimated channel and noise power estimate based on the portion of the known symbol sequence;

frequency domain equalizer (FDEQ), circuitry configured to invert the estimated channel to obtain a FDEQ effect;

a power sensor configured to determine a power output of the FDEQ; and

processing circuitry configured to:

determine a first ratio of signal power to inter-symbol interference based on a frequency domain product of the estimated channel and the FDEQ effect;

determine a second ratio of signal power to neighbor cell interference based on the frequency domain product of the estimated channel and the FDEQ effect;

determine an inter-symbol interference power estimate based on the first ratio and a difference of the power output of the FDEQ and the noise power estimate;

determine an estimate of a neighbor cell interference power estimate based on the second ratio and the difference; and

remove the inter-symbol interference power estimate and the estimate of the neighbor cell interference power estimate from the of the noise power estimate to obtain a corrected noise power.

19. The device of claim 18 , where the processing circuitry is further configured to:

substitute a positive value for the corrected noise power when a sum of the inter-symbol interference power estimate and the neighbor cell interference power estimate are greater than the noise power estimate.

20. The device of claim 18 , where the processing circuitry is further configured to determine the second ratio based on a second frequency domain product of an neighbor cell estimated channel and a neighbor cell FDEQ effect.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2013
From: CHEN, HOU-SHIN; CHIU, FU-HSUAN
To: BROADCOM CORPORATION
Reel/Frame 031259/0252 →
Continuity (2)
Provisional Application 61878405 · Sep 16, 2013
Related Publication 20150078429A1 · Mar 19, 2015