IP Library Granted Patent US 9,250,740
Granted Patent B2
US 9,250,740 · App. 14/037,707 · Granted Feb 2, 2016

Capacitive touch panel device with differing drive pulse widths

Inventors: Akihito Akai (Tokyo, JP); Tatsuya Ishii (Tokyo, JP); Kazuo Okado (Tokyo, JP)
Assignee: Synaptics Display Devices GK
G06F3/0416G06F3/044G06F3/0418
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Quick Facts
Patent No.
US 9,250,740
App. No.
14/037,707
Granted
Feb 2, 2016
Kind
B2
Abstract

It becomes possible to use drive pulses having different pulse widths for one kind of drive pulse signal period. Therefore, even if a voltage acting on a crossing part of drive and detection electrodes is periodically changed through a stray capacitance attributed to an external object such as a finger in an undesired manner, the pulse width of the drive pulse is never fixed with respect to the period, and the periodic buildup of a certain voltage on a detection signal, which would make appreciable noise, is suppressed. Thus, the reduction of detection signals can be suppressed in quantity without switching the pulse signal frequency of the drive pulse of a touch panel.

Claims (48)

1. A semiconductor device comprising:

a touch panel controller for a touch panel having a plurality of drive electrodes, a plurality of detection electrodes, and a plurality of crossing parts formed by the drive and detection electrodes, the touch panel controller comprising

a drive circuit which outputs drive pulses to drive terminals connected to the drive electrodes respectively in a predetermined order; and

a detection circuit which accepts signals arising from the detection electrodes in response to the drive pulses supplied to the drive electrodes, as inputs through detection terminals connected to the detection electrodes, and produces detection data corresponding to a fluctuation in capacitive coupling state at each crossing part,

a capacitance-connecting node at which an output of a buffer is connected to an input stage of the detection circuit through a capacitance; and

a control circuit,

wherein the drive circuit has more than one kind of outputtable pulse width for each kind of pulse signal period of the outputtable drive pulses, and

wherein before outputting the drive pulses to the drive terminals, the control circuit controls the buffer to output more than one kind of pulse having the same pulse width as those of the drive pulses, controls the detection circuit to produce pseudo detection data in response to signals supplied through the capacitance-connecting node, and controls the drive circuit to output a drive pulse having a pulse width decided based on the pseudo detection data.

2. The semiconductor device according to claim 1 , further comprising:

a display controller which outputs a scan pulse to each scan electrode of an active matrix type display panel and a signal voltage to each signal electrode thereof, provided that the active matrix type display panel has a plurality of scan electrodes, a plurality of signal electrodes, and a plurality of display cells each disposed at an intersection of the scan and signal electrodes,

wherein a period of the drive pulse and a pulse width thereof are determined so that the drive pulse does not coincide with the scan pulse in pulse-change timing.

3. The semiconductor device according to claim 1 ,

wherein the capacitance-connecting node is also used as an addition node for adding up, for each crossing part, calibration signals for equalizing reference values of conversion targets, with respect to a conversion range of a conversion circuit operable to convert an input signal of the detection circuit into a digital signal.

4. The semiconductor device according to claim 3 , further comprising:

a display controller which outputs a scan pulse to each scan electrode of an active matrix type display panel and a signal voltage to each signal electrode thereof, provided that the active matrix type display panel has a plurality of scan electrodes, a plurality of signal electrodes, and a plurality of display cells each disposed at an intersection of the scan and signal electrodes,

wherein a period of the drive pulse and a pulse width thereof are determined so that the drive pulse does not coincide with the scan pulse in pulse-change timing.

5. The semiconductor device according to claim 1 ,

wherein the control circuit controls the drive circuit to go through a circuit of drive pulse outputs to all the drive terminals, and forces the detection circuit to create the pseudo detection data for each detection frame for creating detection data on all the crossing parts.

6. The semiconductor device according to claim 5 , further comprising:

a display controller which outputs a scan pulse to each scan electrode of an active matrix type display panel and a signal voltage to each signal electrode thereof, provided that the active matrix type display panel has a plurality of scan electrodes, a plurality of signal electrodes, and a plurality of display cells each disposed at an intersection of the scan and signal electrodes,

wherein a period of the drive pulse and a pulse width thereof are determined so that the drive pulse does not coincide with the scan pulse in pulse-change timing.

7. An electronic device comprising:

a touch panel controller for a touch panel having a plurality of drive electrodes, a plurality of detection electrodes, and a plurality of crossing parts formed by the drive and detection electrodes; and

a processor connected with the touch panel controller,

wherein the touch panel controller includes

a drive circuit which outputs drive pulses to drive terminals connected to the drive electrodes respectively in a predetermined order, and

a detection circuit which accepts signals arising from the detection electrodes in response to the drive pulses supplied to the drive electrodes, as inputs through detection terminals connected to the detection electrodes, and produces detection data corresponding to a fluctuation in capacitive coupling state at each crossing part,

wherein the drive circuit has more than one kind of outputtable pulse width for each kind of pulse signal period of the outputtable drive pulse,

wherein the device further comprises

a capacitance-connecting node at which an output of a buffer is connected to an input stage of the detection circuit through a capacitance; and

a control circuit,

wherein before outputting the drive pulses to the drive terminals, the control circuit controls the buffer to output more than one kind of pulse having the same pulse width as those of the drive pulses, and controls the detection circuit to produce pseudo detection data in response to signals supplied through the capacitance-connecting node,

wherein the processor identifies the pulse width which minimizes a difference between the pseudo detection data detected by the detection circuit and data in the case of the capacitance having a predetermined value, and notifies the control circuit of the identified pulse width, and

wherein the control circuit controls the drive circuit to output drive pulses with the pulse width notified to the drive circuit.

8. The electronic device according to claim 7 , wherein the processor determines, based on detection data detected by the detection circuit, a capacitance change at each crossing part for each pulse width of the drive pulse, and uses detection data obtained by the pulse width to minimize the number of data involving a large fluctuation to calculate coordinates.

9. The electronic device according to claim 7 , further comprising:

a display controller which outputs a scan pulse to each scan electrode of an active matrix type display panel and a signal voltage to each signal electrode thereof, provided that the active matrix type display panel has a plurality of scan electrodes, a plurality of signal electrodes, and a plurality of display cells each disposed at an intersection of the scan and signal electrodes,

wherein a period of the drive pulse and a pulse width thereof are determined so that the drive pulse does not coincide with the scan pulse in pulse-change timing.

10. The electronic device according to claim 7 ,

wherein the capacitance-connecting node is also used as an addition node for adding up, for each crossing part, calibration signals for equalizing reference values of conversion targets with respect to a conversion range of a conversion circuit operable to convert an input signal of the detection circuit into a digital signal.

11. The electronic device according to claim 10 , further comprising:

a display controller which outputs a scan pulse to each scan electrode of an active matrix type display panel and a signal voltage to each signal electrode thereof, provided that the active matrix type display panel has a plurality of scan electrodes, a plurality of signal electrodes, and a plurality of display cells each disposed at an intersection of the scan and signal electrodes,

wherein a period of the drive pulse and a pulse width thereof are determined so that the drive pulse does not coincide with the scan pulse in pulse-change timing.

12. The electronic device according to claim 7 ,

wherein the control circuit controls the drive circuit to go through a circuit of drive pulse outputs to all the drive terminals, and forces the detection circuit to create the pseudo detection data for each detection frame for creating detection data on all the crossing parts.

13. The electronic device according to claim 12 , further comprising:

a display controller which outputs a scan pulse to each scan electrode of an active matrix type display panel and a signal voltage to each signal electrode thereof, provided that the active matrix type display panel has a plurality of scan electrodes, a plurality of signal electrodes, and a plurality of display cells each disposed at an intersection of the scan and signal electrodes,

wherein a period of the drive pulse and a pulse width thereof are determined so that the drive pulse does not coincide with the scan pulse in pulse-change timing.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2024
From: SYNAPTICS JAPAN GK
To: SYNAPTICS INCORPORATED
Reel/Frame 067793/0211 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
CHANGE OF NAME Recorded Aug 8, 2016
From: SYNAPTICS DISPLAY DEVICES GK
To: SYNAPTICS JAPAN GK
Reel/Frame 039711/0862 →
CHANGE OF NAME Recorded Jun 1, 2015
From: SYNAPTICS DISPLAY DEVICES KK
To: SYNAPTICS DISPLAY DEVICES GK
Reel/Frame 035799/0129 →
CHANGE OF NAME Recorded Dec 2, 2014
From: RENESAS SP DRIVERS INC.
To: SYNAPTICS DISPLAY DEVICES KK
Reel/Frame 034512/0678 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2013
From: AKAI, AKIHITO; ISHII, TATSUYA; OKADO, KAZUO
To: RENESAS SP DRIVERS INC.
Reel/Frame 031312/0617 →
Priority Claims (1)
JP 2012-216745 · Sep 28, 2012 · national
Continuity (1)
Related Publication 20140092061A1 · Apr 3, 2014