IP Library Patent Application 14038587
Patent Application
App. No. 14/038,587

METHOD FOR SELECTING OPTIMAL MANUFACTURING PROCESS FOR PRODUCING PRINTED CIRCUIT BOARDS

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Quick Facts
Patent No.
US None
App. No.
14/038,587
Abstract

A method is provided for selecting an optimal manufacturing process for producing printed circuit boards. The method includes measuring electrical characteristics of a reference printed circuit board having circuitry; producing two or more printed circuit boards using two or more candidate manufacturing processes, respectively, each produced printed circuit board having circuitry that is the same as the circuitry of the reference printed circuit board; measuring electrical characteristics of each of the produced printed circuit boards; and selecting a candidate manufacturing process of the two or more candidate manufacturing processes based on the measured electrical characteristics of the reference printed circuit board.

Claims (44)

1 . A method for selecting an optimal manufacturing process for producing printed circuit boards, the method comprising:

measuring electrical characteristics of a reference printed circuit board having circuitry;

producing a two or more printed circuit boards using two or more candidate manufacturing processes, respectively, each produced printed circuit board having circuitry that is the same as the circuitry of the reference printed circuit board;

measuring electrical characteristics of each of the produced printed circuit boards; and

selecting a candidate manufacturing process of the two or more candidate manufacturing processes based on the measured electrical characteristics of the reference printed circuit board.

2 . The method of claim 1 , wherein the measured electrical characteristics of the printed circuit board produced using the selected candidate manufacturing process are the closest to the measured electrical characteristics of the reference printed circuit board.

3 . The method of claim 1 , wherein the reference printed circuit board comprises:

a first surface;

a second surface;

a first transmission line formed on the first surface; and

a second transmission line formed on the second surface,

wherein the first and the second transmission lines of the reference printed circuit board are substantially aligned with each other.

4 . The method of claim 3 , wherein one end of each of the first and the second transmission lines is connected to a signal pad, and the other end of each of the first and the second transmission lines is connected to a termination impedance.

5 . The method of claim 3 , wherein the reference printed circuit board further comprises:

a conductor formed on the first surface; and

one or more vias.

6 . The method of claim 5 , wherein the one or more vias comprise at least one rectangular-shaped via and at least one circular-shaped via.

7 . The method of claim 1 , wherein measuring electrical characteristics of each of the produced printed circuit boards comprises:

measuring a distance between an outer perimeter of a via and a conductor in each of the produced printed circuit boards.

8 . The method of claim 7 , wherein the distance between the outer perimeter of the via and the conductor is measured using a camera.

9 . The method of claim 1 , wherein measuring electrical characteristics of each of the produced printed circuit boards comprises:

measuring S21 parameters of transmission lines on each of the produced printed circuit boards.

10 . The method of claim 9 , wherein the S21 parameters of the transmission lines are measured using a network analyzer connected to signal pads connected to the transmission lines, respectively.

11 . The method of claim 1 , wherein each of the two more candidate manufacturing processes have corresponding processing errors.

12 . A method for selecting an optimal process for manufacturing printed circuit boards, the method comprising:

producing a plurality of printed circuit boards using a plurality of candidate manufacturing processes, respectively, each produced printed circuit board having circuitry that is the same as circuitry of a reference printed circuit board;

measuring electrical characteristics of each of the produced printed circuit boards;

determining which produced printed circuit board has measured electrical characteristics closest to corresponding electrical characteristics of the reference printed circuit board; and

selecting the candidate manufacturing process corresponding to the determined printed circuit board to be the optimal manufacturing process.

13 . The method of claim 12 , wherein the reference printed circuit board comprises:

a first surface;

a second surface;

a first transmission line formed on the first surface; and

a second transmission line formed on the second surface,

wherein the first and the second transmission lines are substantially aligned with each other.

14 . The method of claim 13 , wherein one end of each of the first and the second transmission lines is connected to a signal pad, and the other end of each of the first and the second transmission lines is connected to a termination impedance.

15 . The method of claim 13 , wherein the reference printed circuit board further comprises:

a conductor formed on the first surface; and

a via, wherein a distance between an outer perimeter of the via and the conductor is a preset distance.

16 . The method of claim 15 , wherein the via comprises one of a rectangular-shaped via and a circular-shaped via.

17 . The method of claim 12 , wherein measuring the electrical characteristics of each of the produced printed circuit boards comprises:

measuring S-parameters of transmission lines on each of the produced printed circuit boards.

18 . The method of claim 17 , wherein measuring the electrical characteristics of each of the produced printed circuit boards further comprises:

measuring a distance between an outer perimeter of the via and the conductor in each of the produced printed circuit boards.

Assignments (5)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2013
From: JEONG, JIN; CHUNG, CHRIS; KIM, TAE EUN
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 031294/0392 →