Class HD power amplifier
View Patent ↗A multi-level amplifier including a converter circuit being supplied with a supply voltage and operable to generate at least two output voltages, a voltage comparator circuit adapted to compare each of the output voltages with the supply voltage to generate a driving signal, and an amplifier circuit being supplied with an analog input signal, the amplifier circuit including an analog-to-digital converter coupled to a power stage driver and power stage, wherein the power stage driver receives the driving signal from the voltage comparator.
1. A multi-level amplifier, comprising:
a converter circuit being supplied with a supply voltage and operable to generate at least two output voltages;
a voltage comparator circuit adapted to compare each of the output voltages with the supply voltage to generate a driving signal; and
an amplifier circuit being supplied with an analog input signal, the amplifier circuit including an analog-to-digital converter coupled to a power stage driver and power stage,
wherein the power stage driver receives the driving signal from the voltage comparator.
2. The multi-level amplifier according to claim 1 , wherein the converter circuit is a dual-output buck-boost converter that generates output voltages that are both greater than and less than the supply voltage magnitude.
3. The multi-level amplifier according to claim 1 , wherein the analog-to-digital converter is implemented using a delta-sigma architecture.
4. The multi-level amplifier according to claim 1 , wherein the analog-to-digital converter further includes a quantizer.
5. The multi-level amplifier according to claim 1 , wherein the amplifier circuit further includes a feedback loop between the output of the power stage and the input of the analog-to-digital converter.
6. The multi-level amplifier according to claim 1 , wherein the analog-to-digital converter outputs five or seven digital data levels.
7. The multi-level amplifier according to claim 1 , wherein the power stage includes a plurality of switching elements arranged in an H-bridge configuration.
8. The multi-level amplifier according to claim 7 , wherein each side of the H-bridge arrangement includes a PMOS transistor coupled to each of the output voltages.
9. The multi-level amplifier according to claim 7 , wherein each side of the H-bridge arrangement includes PMOS transistors coupled to each of the output and supply voltages.
10. The multi-level amplifier according to claim 1 , wherein the analog input signal is an audio signal.
11. A multi-level amplifier, comprising:
a converter circuit being supplied with a supply voltage and operable to generate at least two output voltages;
a controller circuit being supplied with an analog input signal and the supply voltage, the controller including a magnitude detector coupled to a first analog to digital converter, and a voltage comparator circuit adapted to compare each of the output voltages with the supply voltage to generate a driving signal; and
an amplifier circuit being supplied with an analog input signal, the amplifier circuit including a second analog-to-digital converter coupled to a power stage driver and power stage,
wherein the power stage driver receives the driving signal from the voltage comparator.
12. The multi-level amplifier according to claim 11 , wherein the converter circuit is a dual-output buck-boost converter that generates output voltages that are both greater than and less than the supply voltage magnitude.
13. The multi-level amplifier according to claim 11 , wherein the second analog-to-digital converter is implemented using a delta-sigma architecture.
14. The multi-level amplifier according to claim 11 , wherein the second analog-to-digital converter further includes a quantizer.
15. The multi-level amplifier according to claim 11 , wherein the amplifier circuit further includes a feedback loop between the output of the power stage and the input of the second analog-to-digital converter.
16. The multi-level amplifier according to claim 11 , wherein the second analog-to-digital converter outputs five or seven digital data levels.
17. The multi-level amplifier according to claim 11 , wherein the power stage includes a plurality of switching elements arranged in an H-bridge configuration.
18. The multi-level amplifier according to claim 17 , wherein each side of the H-bridge arrangement includes a PMOS transistor coupled to each of the output voltages.
19. The multi-level amplifier according to claim 17 , wherein each side of the H-bridge arrangement includes PMOS transistors coupled to each of the output and supply voltages.
20. The multi-level amplifier according to claim 11 , wherein the analog input signal is an audio signal.
21. The multi-level amplifier according to claim 11 , wherein the output voltages of the converter circuit are adjusted according to the first analog-to-digital converter.
22. The multi-level amplifier according to claim 11 , wherein the first analog-to-digital converter is implemented using a low resolution architecture.