IP Library Granted Patent US 9,249,523
Granted Patent B2
US 9,249,523 · App. 14/039,597 · Granted Feb 2, 2016

Electro-polishing and porosification

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Quick Facts
Patent No.
US 9,249,523
App. No.
14/039,597
Granted
Feb 2, 2016
Kind
B2
Abstract

Forming a porous layer on a silicon substrate is disclosed. Forming the porous layer can include placing a silicon substrate in a first solution and conducting a first current through the silicon substrate. It can further include conducting a second current through the silicon substrate resulting in a porous layer on the silicon substrate.

Claims (19)

1. A method, comprising: placing a silicon substrate in a first solution; conducting a first current through the silicon substrate in the first solution; and conducting a second current through the silicon substrate resulting in a porous layer on the silicon substrate, wherein conducting the first current comprises conducting the first current with a current density of 1-100 mA/cm 2 , resulting in a polished layer on the silicon substrate, wherein the first current flattens a surface of the silicon substrate; and conducting the second current comprises conducting the second current with a current density of 0.1-50 mA/cm 2 , resulting in a porous layer on the polished layer on the silicon substrate.

2. The method of claim 1 , wherein conducting the first current comprises applying a high bias voltage.

3. The method of claim 1 , wherein conducting the second current comprises applying a low bias voltage.

4. The method of claim 1 , wherein conducting the first current results in electro-polishing the silicon substrate.

5. The method of claim 1 , wherein conducting the first current comprises conducting the first current that is based on a size of the silicon substrate.

6. The method of claim 1 , wherein conducting the first current comprises conducting the first current that is based on a concentration of the solution.

7. The method of claim 1 , wherein conducting the second current comprises conducting the second current that is based on a size of the silicon substrate.

8. The method of claim 1 , wherein conducting the second current comprises conducting the second current that is based on a concentration of the solution.

9. The method of claim 1 , wherein placing the silicon substrate in the first or second solution comprises placing the silicon substrate in a solution comprised of a chemical selected from the group consisting of hydrofluoric acid (HF), isopropyl alcohol (IPA) and ethanol.

10. The method of claim 1 , wherein conducting the second current through the silicon substrate comprises conducting the second current through the silicon substrate in a second solution.

11. The method of claim 10 , wherein conducting the second current through the silicon substrate in the second solution comprises conducting the second current through the silicon substrate in a porosification solution.

12. A method for forming a porous layer on a silicon substrate, the method comprising: placing a silicon substrate in a first solution; applying a high bias voltage through the silicon substrate, resulting in a polished layer on the silicon substrate, wherein the high bias voltage flattens a surface of the silicon substrate; placing a silicon substrate in a second solution; and forming a porous layer on the polished layer, wherein forming the porous layer includes applying a low bias voltage through the silicon substrate.

13. The method of claim 12 , wherein placing the silicon substrate in the first solution comprises placing the silicon substrate in an electro-polishing solution.

14. The method of claim 12 , wherein placing the silicon substrate in the second solution comprises placing the silicon substrate in a porosification solution.

15. The method of claim 12 , wherein placing the silicon substrate in the first or second solution comprises placing the silicon substrate in a solution comprised of a chemical selected from the group consisting of hydrofluoric acid (HF), isopropyl alcohol (IPA) and ethanol.

16. A method for forming a porous layer on a silicon substrate, the method comprising: placing a silicon substrate in an electro-polishing solution; electro-polishing the silicon substrate, wherein electro-polishing includes conducting a first current through the silicon substrate, resulting in a polished layer on the silicon substrate, wherein the first current flattens a surface of the silicon substrate; placing the silicon substrate in a porosification solution; and forming a porous layer on the polished layer, wherein forming the porous layer includes conducting a second current through the silicon substrate.

17. The method of claim 16 , wherein conducting the first current comprises applying a high bias voltage.

18. The method of claim 16 , wherein conducting the second current comprises applying a low bias voltage.

19. The method of claim 16 , wherein placing the silicon substrate in the electro-polishing or porosification solution comprises placing the silicon substrate in a solution comprised of a chemical selected from the group consisting of hydrofluoric acid (HF), isopropyl alcohol (IPA) and ethanol.

Assignments (5)
SECURITY INTEREST Recorded Jun 27, 2024
From: MAXEON SOLAR PTE. LTD.
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 067924/0062 →
SECOND LIEN SECURITY INTEREST AGREEMENT Recorded Jun 26, 2024
From: MAXEON SOLAR PTE. LTD
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 071343/0553 →
SECURITY INTEREST Recorded Jun 5, 2024
From: MAXEON SOLAR PTE. LTD.
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 067637/0598 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2023
From: SUNPOWER CORPORATION
To: MAXEON SOLAR PTE. LTD.
Reel/Frame 062699/0875 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 23, 2014
From: RIM, SEUNG BUM
To: SUNPOWER CORPORATION
Reel/Frame 032737/0203 →