IP Library Granted Patent US 9,921,955
Granted Patent B1
US 9,921,955 · App. 14/040,953 · Granted Mar 20, 2018

Flash write amplification reduction

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Quick Facts
Patent No.
US 9,921,955
App. No.
14/040,953
Granted
Mar 20, 2018
Kind
B1
Abstract

A computer-executable method, system, and computer program product for managing a flash cache module in a data storage system, wherein the data storage system is in communication with a data storage array, the computer-executable method comprising receiving a request to write a first data block to the flash cache module; analyzing the flash cache module to determine if there is a free portion of memory on the flash cache module for the first data block; and upon a negative determination, writing the first data block to a used portion of memory on the flash cache module.

Claims (56)

1. A computer-executable method of managing a flash cache module in a data storage system, wherein the data storage system is in communication with a data storage array, the computer-executable method comprising:

designating which portions of the flash cache module are enabled to be overwritten during management of the flash cache module;

receiving a request to write a first data block to the flash cache module;

analyzing the flash cache module to determine if there is a free portion of memory on the flash cache module for the first data block;

upon a negative determination, writing the first data block to a used portion of memory on the flash cache module, wherein the data in the used portion of memory is overwritten by the first data block without destaging the used portion of memory;

notifying the data storage system that the used portion of memory on the flash cache module was overwritten; and

storing references to overwritten data of the flash cache module to overwrite storage;

analyzing the references to overwritten data to determine which portions of overwritten data will be scheduled to be cached again.

2. The computer-executable method of claim 1 , further comprising upon a positive determination, writing the first data block to the free portion of memory.

3. The computer-executable method of claim 1 , wherein writing the first data block further comprises:

searching the used portion of memory for a second data block;

sending an update to the data storage system relating to the second data block; and

writing the first data block to the used portion of memory, wherein the writing of the first data block overwrites the second data block.

4. The computer-executable method of claim 3 , further comprising, at the data storage system, deciding not to re-cache the second data block on the flash cache module.

5. The computer-executable method of claim 3 , further comprising:

returning a response of success to the write request; and

re-caching the second data block on the flash cache module.

6. A system, comprising:

a data storage system including a flash cache module, wherein the data storage system is in communication with a data storage array; and

computer-executable logic encoded in memory of one or more computers in communication with the data storage system to enable management of the flash cache module in the data storage system, wherein the computer-executable program logic is configured for the execution of:

designating which portions of the flash cache module are enabled to be overwritten during management of the flash cache module;

receiving a request to write a first data block to the flash cache module;

analyzing the flash cache module to determine if there is a free portion of memory on the flash cache module for the first data block;

upon a negative determination, writing the first data block to a used portion of memory on the flash cache module, wherein the data in the used portion of memory is overwritten by the first data block without destaging the used portion of memory;

notifying the data storage system that the used portion of memory on the flash cache module was overwritten;

storing references to overwritten data of the flash cache module to overwrite storage;

analyzing the references to overwritten data to determine which portions of overwritten data will be scheduled to be cached again.

7. The system of claim 6 , wherein the computer-executable program logic is further configured for the execution of upon a positive determination, writing the first data block to the free portion of memory.

8. The system of claim 6 , wherein writing the first data block further comprises:

searching the used portion of memory for a second data block;

sending an update to the data storage system relating to the second data block; and

writing the first data block to the used portion of memory, wherein the writing of the first data block overwrites the second data block.

9. The system of claim 8 , wherein the computer-executable program logic is further configured for the execution of:

at the data storage system, deciding not to re-cache the second data block on the flash cache module.

10. The system of claim 8 , wherein the computer-executable program logic is further configured for the execution of:

returning a response of success to the write request; and

re-caching the second data block on the flash cache module.

11. A computer program product for managing a flash cache module in a data storage system, wherein the data storage system is in communication with a data storage array, the computer program product comprising:

a non-transitory computer readable medium encoded with computer-executable program code for using read signatures in replication, the code configured to enable the execution of:

designating which portions of the flash cache module are enabled to be overwritten during management of the flash cache module;

receiving a request to write a first data block to the flash cache module;

analyzing the flash cache module to determine if there is a free portion of memory on the flash cache module for the first data block;

upon a negative determination, writing the first data block to a used portion of memory on the flash cache module, wherein the data in the used portion of memory is overwritten by the first data block without destaging the used portion of memory;

notifying the data storage system that the used portion of memory on the flash cache module was overwritten; and

storing references to overwritten data of the flash cache module to overwrite storage;

analyzing the references to overwritten data to determine which portions of overwritten data will be scheduled to be cached again.

12. The computer program product of claim 11 , wherein the code is further configured to enable the execution of upon a positive determination, writing the first data, block, to the free portion of memory.

13. The computer program product of claim 11 , wherein writing the first data block further comprises:

searching the used portion of memory for a second data block;

sending an update to the data storage system relating to the second data block; and

writing the first data block to the used portion of memory, wherein the writing of the first data block overwrites the second data block.

14. The computer program product of claim 13 , wherein the code is further configured to enable the execution of:

at the data storage system, deciding not to re-cache the second data block on the flash cache module.

15. The computer program product of claim 13 , wherein the code is further configured to enable the execution of:

returning a response of success to the write request; and

re-caching the second data block on the flash cache module.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (046366/0014) Recorded May 20, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060450/0306 →
RELEASE OF SECURITY INTEREST AT REEL 046286 FRAME 0653 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058298/0093 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 21, 2019
From: CREDANT TECHNOLOGIES, INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049452/0223 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 046366/0014 →
PATENT SECURITY AGREEMENT (CREDIT) Recorded Jun 1, 2018
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 046286/0653 →
KEY EMPLOYEE AGREEMENT Recorded Feb 1, 2018
From: DERBEKO, PHILIP
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 045245/0702 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2018
From: DON, ARIEH; BENHANOKH, GABRIEL; NATANZON, ASSAF; EYAL, ANAT
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 044794/0505 →