Supervision of I2S digiital audio bus
View Patent ↗An approach for supervision of I2S bus audio paths employing a signal derived from a word clock signal of the I2S bus.
1. A method of supervision of an audio bus having a first channel and a second channel, comprising the steps of:
receiving a first signal having a first frequency from the audio bus at a divider, wherein the first signal is a word clock signal having a square wave;
reducing the first frequency of the first signal resulting in a second signal having a second frequency;
transmitting the second signal having the second frequency over the first channel of the audio bus when the first channel is not in use; and
verifying transmission of the second signal with the second frequency on the audio bus.
2. The method of claim 1 , where the second signal is a sine wave that results from the square wave by a filter.
3. The method of claim 1 , where the first channel is not in use and the second channel is an active channel.
4. The method of claim 1 , where the first frequency is a 48 KHz frequency.
5. The method of claim 4 , where the second frequency is a 12 kHz frequency.
6. The method of claim 1 , where verifying transmission of the second signal further includes, indicates that a fault condition exists.
7. The method of claim 1 , where the audio bus is an I2S audio bus.
8. An apparatus with an audio bus having a first channel and a second channel, comprising:
a divider in receipt of a first signal having a first frequency from the audio bus, where the divider reduces the first frequency resulting in a second signal having a second frequency, wherein the first signal is a word clock signal having a square wave;
a transmitter that transmits the second signal having the second frequency over the first channel of the audio bus when the first channel is not in use;
a receiver in receipt of the second signal with the second frequency on the audio bus; and
verifying transmission of the second signal with the second frequency on the audio bus.
9. The apparatus of claim 8 , further comprising a filter that converts the square wave associated with the first signal into a sine wave associated with the second signal.
10. The apparatus of claim 8 , where the first channel is not in use and the second channel is an active channel.
11. The apparatus of claim 8 , where the first frequency is a 48 KHz frequency.
12. The apparatus of claim 11 , where the second frequency is a 12 kHz frequency.
13. The apparatus of claim 8 , where the receiver in receipt of the second signal further includes, a fault indication that is set if a fault condition is detected at the receiver.
14. An apparatus with an I2S bus having a first channel and a second channel, comprising:
a divider in receipt of a first signal having a first frequency from the I2S bus, where the divider reduces the first frequency resulting in a second signal having a second frequency; wherein the first signal is a word clock signal having a square wave;
a transmitter that transmits the second signal having the second frequency over the first channel of the I2S bus when the first channel is not in use; and
a receiver that receives and verifies transmission of the second signal with the second frequency on the I2S bus.
15. The apparatus of claim 14 , further comprising a filter that converts the square wave associated with the first signal into a sine wave associated with the second signal.
16. The apparatus of claim 14 , where the first channel is not in use and the second channel is an active channel.
17. The apparatus of claim 14 , where the first frequency is a 48 KHz frequency.
18. The apparatus of claim 17 , where the second frequency is a 12 kHz frequency.