Method and apparatus for bit-interleaving
View Patent ↗A manner of processing data for transmission in a data communication network. A node having a main memory and an interleaver is provided. Received data is stored in the main memory and a bandwidth map is prepared. The data is then selectively read out and pre-processed according to the bandwidth map and stored in an interleaver memory. The data is later read out and post-processed before interleaving into a downstream data frame. The pre- and post-processing provide the data in a more efficient form for interleaving.
1. A method of processing data traffic for forwarding, comprising:
storing received data packets in a main memory device in an OLT (optical line terminal) of a PON (passive optical network);
identifying a ONU (optical network unit) destination for each packet in memory; determining a bandwidth map for each destination, wherein the bandwidth map assigns to each destination a lane defined by rate and offset;
interleaving the stored data according to the bandwidth map, wherein interleaving comprises reading a plurality of data words from the main memory device and writing the plurality of data words into a slice of an interleaver memory, the interleaver memory comprising a plurality of memory slices; wherein each memory slice of the plurality of slices comprises a plurality of sub-modules and wherein writing each word into a memory slice comprises writing each word of the plurality of words into a respective sub-module of the memory slice such that only one word of the plurality of words is written into each sub-module; and
prior to writing each word into a respective memory sub-module, performing a shuffle of the bits of the word, wherein the bit shuffle comprises at least one perfect out shuffle;
where the bit shuffle comprises s perfect out shuffles, where the lane rate associated with the word in the bandwidth map is 1/2 s .
2. The method of claim 1 , wherein each memory sub-module comprises a plurality of rows, and wherein writing each byte of the word into a respective memory sub-module comprises writing each word into a row as indicated by the bandwidth map.
3. The method of claim 1 , wherein the row indicated in the bandwidth map is a function of the rate associated with the word.
4. The method of claim 1 , further comprising performing a word rotation of the words of the plurality of words.
5. The method of claim 4 , wherein the word rotation comprises shifting each word o times, where o is the lane offset associated with the word in the bandwidth map.
6. The method of claim 1 , further comprising, prior to writing each word into a respective memory sub-module, performing a shuffle of the words of the plurality of data words.
7. The method of claim 6 , wherein the word rotation is performed subsequent to the word shuffle and prior to writing the plurality of words into its respective memory slice.
8. The method of claim 1 , further comprising transmitting the interleaved data.