IP Library Granted Patent US 9,451,250
Granted Patent B2
US 9,451,250 · App. 14/044,612 · Granted Sep 20, 2016

Bounded rate compression with rate control for slices

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Quick Facts
Patent No.
US 9,451,250
App. No.
14/044,612
Granted
Sep 20, 2016
Kind
B2
Abstract

A system implements rate control for encoding and decoding operations, for example, operations performed on slices of data such as image data. The system implements a transformation from actual buffer fullness to rate controlled fullness. With the rate controlled fullness model, the encoders and decoders adapt bit allocation responsive to rate controlled fullness, instead of the actual fullness.

Claims (65)

1. A video-coding method comprising:

obtaining a fullness value for a buffer;

applying a transformation to the fullness value to obtain a transformed fullness, where applying the transformation comprising:

applying a piecewise linear offset value to the fullness value; and

applying a piecewise linear scale factor to the fullness value;

making a quantization decision responsive to the transformed fullness; and

coding data for a portion of an image in the buffer according to the quantization decision.

2. The video-coding method of claim 1 , where making the quantization decision comprises:

determining a target number of bits per unit of data to be coded.

3. The video-coding method of claim 1 , where making the quantization decision comprises:

allocating a selected number of bits per unit of data to be coded for a first image line; and

allocating fewer than the selected number of bits per unit of data to be coded for a different image line subsequent to the first image line.

4. The video-coding method of claim 1 , where making the quantization decision comprises:

allocating, for a first unit of data additional coding bits than are allocated for a second unit of data with more prediction information than the first unit of data.

5. The video-coding method of claim 1 , where coding comprises:

coding a line of an image slice.

6. A video-coding system comprising:

a buffer operable to store coding units to be coded;

transformation circuitry configured to:

obtain a fullness value for the buffer; and

apply a transformation to the fullness value to obtain a transformed buffer fullness, where the transformation comprises:

a piecewise linear offset value applied to the fullness value; and

a piecewise linear scale factor applied to the fullness value;

quantization adjustment circuitry configured to, responsive to the transformed buffer fullness:

allocate a number of target bits for coding the coding units that varies responsive to an amount of prediction information that is available for the coding units; and

coding circuitry configured to code data for a coding unit of an image in the buffer according to the number of target bits.

7. The video-coding system of claim 6 , where:

the quantization adjustment circuitry comprises a mapping of transformed buffer fullness to a quantization output.

8. The video-coding system of claim 7 , where:

the quantization output comprises:

a minimum quantization parameter; and

a maximum quantization parameter.

9. The video-coding system of claim 7 , where:

the quantization adjustment circuitry comprises:

long term quantization parameter selection circuitry configured to map the transformed buffer fullness to a first quantization output according to multiple transformed buffer fullness ranges defined by the long term quantization parameter selection circuitry.

10. The video-coding system of claim 9 , where:

the quantization adjustment circuitry further comprises:

short term quantization parameter adjustment circuitry configured to receive the quantization output from the long term quantization parameter selection circuitry, and responsively determine a different, second quantization output.

11. A video-coding system comprising:

buffer level tracker circuitry comprising a buffer fullness output;

linear transformation circuitry coupled with the buffer fullness output and comprising:

an offset value generator comprising an offset value output comprising a piecewise linear offset value;

a scale value generator comprising a scale value output comprising a piecewise linear scale value; and

transformation circuitry configured to apply a linear transformation to the buffer fullness output responsive to the offset value output and the scale value output, to obtain a modified buffer fullness output;

multiple stage quantization selection circuitry comprising:

a mapping of modified buffer fullness to a quantization parameter range; and

parameter adjustment circuitry configured to obtain a quantization parameter within the quantization parameter range responsive to a prior coding result and a prior value of the quantization parameter; and

coding circuitry configured to code data for a portion of an image in the buffer according to the quantization parameter.

12. The video-coding system of claim 11 , where:

the linear transformation is configured to cause additional bits per pixel to be allocated to an image line without prediction information, as compared to subsequent image lines with prediction information.

13. The video-coding method of claim 1 , further comprising where making the quantization decision comprises selecting a quantization output responsive to a mapping of the transformed fullness to the quantization output.

14. The video-coding method of claim 13 , where:

the quantization output comprises:

a minimum quantization parameter; and

a maximum quantization parameter.

15. The video-coding method of claim 13 , where selecting the quantization output comprises mapping the transformed buffer fullness to a first quantization output according to multiple transformed buffer fullness ranges defined for long term quantization parameter control.

16. The video-coding method of claim 15 , further comprising determining a different, second quantization output responsive to the first quantization output and a buffer fullness range defined for defined for short term quantization parameter control.

17. The video-coding method of claim 1 , where:

obtaining the fullness value for the buffer comprises obtaining a fullness value for the buffer that falls outside of a pre-determined valid range of fullness for the buffer; and

applying the transformation to the fullness value to obtain the transformed fullness comprises applying the transformation to the fullness value to obtain a transformed fullness within the pre-determined valid range.

18. The video-coding system of claim 6 , where the quantization adjustment circuitry is configured to allocate a number of target bits for coding the coding units that varies responsive to the amount of prediction information that is available for the coding units by:

allocating a selected number of bits per unit of data to be coded for a first image line; and

allocating fewer than the selected number of bits per unit of data to be coded for a different image line subsequent to the first image line.

19. The video-coding system of claim 6 , where the quantization adjustment circuitry is configured to allocate a number of target bits for coding the coding units that varies responsive to the amount of prediction information that is available for the coding units by: allocating, for a first coding unit additional coding bits than are allocated for a second coding unit with more prediction information than the first coding unit.

20. The video-coding system of claim 6 , further comprising coding circuitry configured to code data for a coding unit of an image by coding a line of an image slice in accord with the number of target bits.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2013
From: MACINNIS, ALEXANDER GARLAND; WALLS, FREDERICK GEORGE
To: BROADCOM CORPORATION
Reel/Frame 031336/0174 →