IP Library Granted Patent US 8,878,290
Granted Patent B2
US 8,878,290 · App. 14/046,361 · Granted Nov 4, 2014

Semiconductor device

Inventors: Hidefumi Takaya (Miyoshi, JP); Narumasa Soejima (Seto, JP)
Assignee: Toyota Jidosha Kabushiki Kaisha
H01L29/7831
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Quick Facts
Patent No.
US 8,878,290
App. No.
14/046,361
Granted
Nov 4, 2014
Kind
B2
Abstract

A semiconductor substrate of a semiconductor device includes a body region of a first conductivity type, a drift region of a second conductivity type coming into contact with a lower surface of the body region, a gate electrode that is provided in a gate trench passing through the body region and extending to the drift region and faces the body region, and a gate insulator that is provided between the gate electrode and a wall surface of the gate trench. An inverted U-shaped section is formed in a lower surface of the gate insulator, and a floating region of the first conductivity type is formed in the inverted U-shaped section. The floating region protrudes under a portion that is located at a lowermost portion in the lower surface of the gate insulator.

Claims (6)

1. A semiconductor device comprising:

a semiconductor substrate that includes: a body region of a first conductivity type formed in an upper surface of the semiconductor substrate; a drift region of a second conductivity type that is contacted with a lower surface of the body region; a gate electrode that is provided in a gate trench passing through the body region and extending to the drift region and faces the body region; a gate insulator that is provided between the gate electrode and a wall surface of the gate trench and formed with an inverted U-shaped section in a lower surface; and a floating region of the first conductivity type that is enclosed by the inverted U-shaped section and the drift region and in which a lower surface of the floating region is formed under a portion that is located at a lowermost portion in the lower surface of the gate insulator;

a first main electrode that is formed on the upper surface of the semiconductor substrate and connected to the body region; and

a second main electrode that is formed on a lower surface of the semiconductor substrate.

2. The semiconductor device according to claim 1 , wherein a width of the floating region fits within a range of a width of the gate trench in a cross section where the semiconductor substrate is cut away in a plane that is perpendicular to an upper surface of the semiconductor substrate and also orthogonal to a longitudinal direction of the gate trench.

3. The semiconductor device according to claim 2 , wherein the width of the floating region fits within the width of the inverted U-shaped section in the cross section.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 052281/0019 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2013
From: TAKAYA, HIDEFUMI; SOEJIMA, NARUMASA
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 031349/0671 →
Priority Claims (1)
JP 2012-224078 · Oct 9, 2012 · national
Continuity (1)
Related Publication 20140097490A1 · Apr 10, 2014