Hybrid DC-DC converters for power amplifiers
View Patent ↗Methods and apparatus, including computer program products, are provided for hybrid DC-DC converters. In one aspect, there is provided a method. The method may include tracking, by an envelope detector, an envelope of a signal being amplified by an amplifier. The method may further include supplying, by a first direct-current to direct-current converter, power to the amplifier, the power supplied by the first direct-current to direct-current converter including one or more high-frequency components of the envelope tracked by the envelope detector. The method may further include supplying, by a second direct-current to direct-current converter, power to the amplifier, the power supplied by the second direct-current to direct-current converter including one or more low-frequency components of the envelope tracked by the envelope detector. Related systems, apparatuses, and computer program products are also disclosed.
1. An apparatus comprising:
an envelope detector to track an envelope of a signal being amplified by an amplifier;
a first direct-current to direct-current switching converter supplying, via a first dead time control circuit, power to the amplifier, the power supplied by the first direct-current to direct-current switching converter including one or more high-frequency components of the envelope tracked by the envelope detector, wherein the first direct-current to direct-current switching converter is a switching power supply; and
a second direct-current to direct-current switching converter supplying power, via a second dead time control circuit, to the amplifier, the power supplied by the second direct-current to direct-current switching converter including one or more low-frequency components of the envelope tracked by the envelope detector, wherein the second direct-current to direct-current switching converter is another switching power supply.
2. The apparatus of claim 1 , further comprising:
a power amplifier coupled to the envelope detector, wherein the envelope detector couples to input of the first direct-current to direct-current switching converter, and wherein the envelope detector couples to another input of the second direct-current to direct-current switching converter.
3. The apparatus of claim 1 , wherein the first direct-current to direct-current switching converter is characterized by a high frequency response defined at least in part by a fast ramp voltage provided as an input to the first dead time control circuit.
4. The apparatus of claim 2 , wherein the first transistor width is between about 500 microns and about 1000 microns in a 65 nanometer semiconductor process.
5. The apparatus of claim 1 , wherein the second direct-current to direct-current switching converter is characterized by a low frequency response defined at least in part by a slow ramp voltage provided as an input to the second dead time control circuit.
6. The apparatus of claim 2 , wherein the second transistor width is between about 5 millimeters and about 10 millimeters in a 65 nanometer semiconductor process.
7. The apparatus of claim 1 , wherein a wireless user equipment includes the apparatus.
8. The apparatus of claim 1 , wherein the first direct-current to direct-current switching converter operates at a switching frequency of two hundred megahertz, or higher, to enable high power efficiency, when the first direct-current to direct-current switching converter includes one or more transistors with widths between about 500 microns and about 1000 microns.
9. The apparatus of claim 1 , wherein the second direct-current to direct-current switching converter operates at a switching frequency of below two hundred megahertz to enable high power efficiency, when the second direct-current to direct-current switching converter includes one or more transistors with widths between about 5 millimeters and about 10 millimeters.
10. The apparatus of claim 1 , wherein the first direct-current to direct-current switching converter is characterized by a high frequency response defined at least in part by a first transistor width, wherein the second direct-current to direct-current switching converter is characterized by a low frequency response defined at least in part by a second transistor width, wherein the first transistor width is smaller than the second transistor width.
11. A non-transitory computer-readable medium encoded with instructions that, when executed by at least one processor, cause at least the following:
tracking, by an envelope detector, an envelope of a signal being amplified by an amplifier;
supplying, by a first direct-current to direct-current switching converter, power to the amplifier, the power supplied, via a first dead time control circuit, by the first direct-current to direct-current switching converter including one or more high-frequency components of the envelope tracked by the envelope detector, wherein the first direct-current to direct-current switching converter is a switching power supply; and
supplying, by a second direct-current to direct-current switching converter, power to the amplifier, the power supplied, via a second dead time control circuit, by the second direct-current to direct-current switching converter including one or more low-frequency components of the envelope tracked by the envelope detector, wherein the second direct-current to direct-current switching converter is another switching power supply.
12. The non-transitory computer-readable medium of claim 11 further comprising:
coupling a power amplifier to the envelope detector, wherein the envelope detector couples to an input of the first direct-current to direct-current switching converter, and wherein the envelope detector couples to another input of the second direct-current to direct-current switching converter.
13. The non-transitory computer-readable medium of claim 11 ,
wherein the first direct-current to direct-current switching converter is characterized by a high frequency response defined at least in part by a fast ramp voltage provided as an input to the first dead time control circuit.
14. The non-transitory computer-readable medium of claim 12 ,
wherein the first transistor width is between about 500 microns and about 1000 microns in a 65 nanometer semiconductor process.
15. The non-transitory computer-readable medium of claim 11 , wherein the second direct-current to direct-current switching converter is characterized by a low frequency response defined at least in part by a slow ramp voltage provided as an input to the second dead time control circuit.
16. The non-transitory computer-readable medium of claim 12 , wherein the second transistor width is between about 5 millimeters and about 10 millimeters in a 65 nanometer semiconductor process.
17. The non-transitory computer-readable medium of claim 11 , wherein a wireless user equipment includes the envelope detector, the first direct-current to direct-current switching converter, and the second direct-current to direct-current switching converter.
18. An method comprising:
tracking, by an envelope detector, an envelope of a signal being amplified by an amplifier;
supplying, by a first direct-current to direct-current switching converter, power to the amplifier, the power supplied, via a first dead time control circuit, by the first direct-current to direct-current switching converter including one or more high-frequency components of the envelope tracked by the envelope detector, wherein the first direct-current to direct-current switching converter is a switching power supply; and
supplying, by a second direct-current to direct-current switching converter, power to the amplifier, the power supplied, via a second dead time control circuit, by the second direct-current to direct-current switching converter including one or more low-frequency components of the envelope tracked by the envelope detector, wherein the second direct-current to direct-current switching converter is another switching power supply.
19. The method of claim 18 , further comprising:
coupling a power amplifier to the envelope detector, wherein the envelope detector couples to an input of the first direct-current to direct-current switching converter, and wherein the envelope detector couples to another input of the second direct-current to direct-current switching converter.
20. The method of claim 18 , wherein the first direct-current to direct-current switching converter is characterized by a high frequency response defined at least in part by a fast ramp voltage provided as an input to the first dead time control circuit.
21. The method of claim 19 , wherein the first transistor width is between about 500 microns and about 1000 microns in a 65 nanometer semiconductor process.
22. The method of claim 18 , wherein the second direct-current to direct-current switching converter is characterized by a low frequency response defined at least in part a slow ramp voltage provided as an input to the second dead time control circuit.
23. The method of claim 19 , wherein the second transistor width is between about 5 millimeters and about 10 millimeters in a 65 nanometer semiconductor process.