Methods circuits apparatuses and systems for providing current to a non-volatile memory array and non-volatile memory devices produced accordingly
View Patent ↗Disclosed are methods, circuits, apparatuses and systems for providing power to a dynamic load such as a non-volatile memory array. According to embodiments, a voltage source may be adapted to generate and output a supply current at substantially a target voltage through a regulating transistor whose channel is in series between an output terminal of said charge pump and an input terminal of said NVM array. A discharge circuit branch coupled to an output terminal of the regulating transistor may be adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage. A bulk regulating circuit branch coupled to a bulk of the regulating transistor may be adapted to reduce a bulk-voltage of the regulating transistor when a voltage at the regulating transistor output terminal exceeds a defined threshold voltage.
1. A power supply circuit for a non-volatile memory (NVM) array, said circuit comprising:
a voltage source adapted to output an array supply current at substantially a target voltage;
a regulating transistor whose channel is in series between an output terminal of said voltage source and an input terminal of the NVM array; and
a bulk regulating circuit branch coupled to a bulk of said regulating transistor and adapted to reduce a bulk-voltage of said regulating transistor when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage.
2. The circuit according to claim 1 , further comprising a discharge circuit branch coupled to an output terminal of said regulating transistor and adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a second defined threshold voltage.
3. The power supply circuit according to claim 2 , wherein the first and the second threshold defined voltages are substantially the same.
4. The power supply circuit according to claim 2 , further comprising a reference voltage branch adapted to provide a reference voltage to said discharge and said bulk regulating circuit branches based at least partially on an output of said voltage source.
5. The power supply circuit according to claim 1 , wherein said regulating transistor is a field effect transistor (FET).
6. The power supply circuit according to claim 1 , wherein said circuit is adapted to provide sensing current for concurrent sensing of a dynamic set of NVM cells.
7. The power supply circuit according to claim 6 , wherein said regulating transistor output terminal is connected to a multiplexer configured to bridge current from said power supply circuit to at least one terminal of the dynamic set of NVM cells.
8. A non-volatile memory (NVM) device, said device comprising:
a non-volatile memory array including a plurality of NVM cells;
a voltage source adapted to output an NVM array supply current at substantially a target voltage;
a regulating transistor whose channel is in series between an output terminal of said charge pump and an input terminal of said NVM array;
a discharge circuit branch coupled to an output terminal of said regulating transistor and adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage; and
a bulk regulating circuit branch coupled to a bulk of said regulating transistor and adapted to reduce a bulk-voltage of said regulating transistor when a voltage at the regulating transistor output terminal exceeds a second defined threshold voltage.
9. The non-volatile memory (NVM) device according to claim 8 , wherein the first and the second threshold voltages are substantially the same.
10. The non-volatile memory (NVM) device according to claim 8 , further comprising a reference voltage branch adapted to provide a reference voltage to said discharge and said bulk regulating circuit based at least partially on an output of said high voltage source.
11. The non-volatile memory (NVM) device according to claim 8 , wherein said regulating transistor is a field effect transistor (FET).
12. The non-volatile memory (NVM) device according to claim 8 , wherein said circuit is adapted to provide sensing current for concurrent sensing of a dynamic set of non-volatile memory cells.
13. The non-volatile memory (NVM) device according to claim 12 , wherein said regulating transistor output terminal is connected to a multiplexer configured to bridge current from said power supply circuit to drain terminals of the dynamic set of non-volatile memory cells.
14. A method for supplying current to a dynamic load on an integrated circuit, said method comprising:
generating supply current at substantially a target voltage;
passing the supply current through a regulating transistor; and
responsive to a voltage at the regulating transistor output terminal exceeding a first defined threshold voltage reducing a bulk-voltage of said regulating transistor.
15. The method according to claim 14 , further comprising draining away current from the regulating transistor output terminal.
16. The method according to claim 15 , wherein draining away current is responsive to the voltage at the regulating transistor output terminal exceeding a second defined threshold voltage.
17. The method according to claim 16 , wherein the first and second threshold voltages are substantially the same.
18. The method according to claim 14 , further comprising generating a reference voltage used to determine when the regulating transistor output terminal exceeds a first or a second threshold voltage.
19. A power supply circuit for providing electrical power to a dynamic load, said supply circuit comprising:
a voltage source adapted to output a supply current at substantially a target voltage associated with the load;
a regulating transistor whose channel is in series between an output terminal of said voltage source and an input terminal of the dynamic load; and
a bulk regulating circuit branch coupled to a bulk of said regulating transistor and adapted to reduce a bulk-voltage of said regulating transistor when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage.
20. The circuit according to claim 19 , further comprising a discharge circuit branch coupled to an output terminal of said regulating transistor and adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a second defined threshold voltage.
21. The power supply circuit according to claim 20 , wherein the first and the second threshold defined voltages are substantially the same.
22. The power supply circuit according to claim 20 , further comprising a reference voltage branch adapted to provide a reference voltage to said discharge and said bulk regulating circuit branches based at least partially on an output of said voltage source.
23. The power supply circuit according to claim 19 , wherein said regulating transistor is a field effect transistor (FET).
24. The power supply circuit according to claim 19 , wherein said supply circuit is adapted to provide current to a dynamic load comprised of a switchable set of loads.