III-nitride wafer fabrication
View Patent ↗A method for fabrication of a III-nitride film over a silicon wafer that includes forming control joints to allow for overall stress relief in the III-nitride film during the growth thereof.
1. A method of fabricating a semiconductor wafer, said method comprising:
forming stress reduction trenches in a surface of a silicon substrate, said stress reduction trenches residing in regions designated to serve as dicing streets;
growing a III-nitride body over said surface of said silicon substrate, said III-nitride body filling an entire space within at least one of said stress reduction trenches, wherein said III-nitride body extends continuously over an edge between said surface and said at least one of said stress reduction trenches.
2. The method of claim 1 further comprising dicing said silicon substrate into individual devices by cutting said silicon substrate along said dicing streets.
3. The method of claim 1 , wherein said stress reduction trenches cross one another.
4. The method of claim 1 , wherein said stress reduction trenches form a grid.
5. The method of claim 1 , wherein said III-nitride body comprises AlN.
6. The method of claim 1 , wherein said III-nitride body is discontinuous over said stress reduction trenches.
7. The method of claim 1 further comprising forming a stress relief crack in said III-nitride body over said at least one of said stress reduction trenches.
8. A method of fabricating a semiconductor wafer, said method comprising:
forming stress reduction trenches in a surface of a silicon substrate, said stress reduction trenches residing in regions designated to serve as dicing streets, said dicing streets wider than said stress reduction trenches;
growing a III-nitride body over said surface of said silicon substrate, said III-nitride body filling an entire space within at least one of said stress reduction trenches, wherein said III-nitride body extends continuously over an edge between said surface and said at least one of said stress reduction trenches;
forming at least one III-nitride device over said III-nitride body.
9. The method of claim 8 further comprising dicing said silicon substrate into individual III-nitride devices by cutting said silicon substrate along said dicing streets.
10. The method of claim 8 , wherein said stress reduction trenches cross one another.
11. The method of claim 8 , wherein said stress reduction trenches form a grid.
12. The method of claim 8 , wherein said III-nitride body comprises AlN.
13. The method of claim 8 , wherein said III-nitride body is discontinuous over said stress reduction trenches.
14. The method of claim 8 further comprising forming a stress relief crack in said III-nitride body over said at least one of said stress reduction trenches.