IP Library Granted Patent US 8,940,575
Granted Patent B2
US 8,940,575 · App. 14/052,023 · Granted Jan 27, 2015

Method of producing semiconductor device, solid-state imaging device, method of producing electric apparatus, and electric apparatus

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Quick Facts
Patent No.
US 8,940,575
App. No.
14/052,023
Granted
Jan 27, 2015
Kind
B2
Abstract

There is provided a method of producing a semiconductor device. The method includes the steps of: forming a first hard mask having an opening above a substrate; forming a sacrificial film above a side surface of the opening of the first hard mask; forming a second hard mask in the opening having the sacrificial film above the side surface; removing the sacrificial film after the second hard mask is formed; ion implanting a first conductivity-type impurity through the first hard mask; and ion implanting a second conductivity-type impurity through the first and second hard masks.

Claims (31)

1. A method of producing a semiconductor device, the method comprising:

a step of forming a first opening through a first electrically-insulative layer, said first electrically-insulative layer being on a semiconductor substrate during the step of forming the first opening;

a step of depositing a second electrically-insulative layer in said first opening, said second electrically-insulative layer being on said semiconductor substrate after the step of depositing the second electrically-insulative layer;

a step of implanting first ions through a second opening and into a compensation region of the semiconductor substrate, said second opening being a space between said first electrically-insulative layer and said second electrically-insulative layer; and

a step of removing said second electrically-insulative layer, said first electrically-insulative layer remaining on said semiconductor substrate after the step of removing the second electrically-insulative layer.

2. The method according to claim 1 , the method further comprising:

a step of depositing a sacrificial film on a sidewall of the first opening prior to the step of depositing the second electrically-insulative layer, said second electrically-insulative layer touching said sacrificial film after the step of depositing the second electrically-insulative layer.

3. The method according to claim 1 , further comprising:

a step of implanting second ions through said first opening and into an impurity region of the semiconductor substrate after the step of removing the second electrically-insulative layer.

4. The method according to claim 3 , wherein a stopper layer is between said first electrically-insulative layer and said semiconductor substrate.

5. The method according to claim 4 , wherein said stopper layer is an electrical insulator.

6. The method according to claim 4 , wherein said stopper layer is a silicon nitride.

7. The method according to claim 4 , wherein said stopper layer is a P—SiN.

8. The method according to claim 4 , wherein said stopper layer touches said first electrically-insulative layer and said semiconductor substrate.

9. The method according to claim 4 , wherein said stopper layer is between said second electrically-insulative layer and said semiconductor substrate, said stopper layer touching said second electrically-insulative layer and said semiconductor substrate.

10. The method according to claim 4 , wherein said first ions are implanted through said stopper layer.

11. The method according to claim 4 , wherein said second ions are implanted through said stopper layer.

12. The method according to claim 4 , wherein said first opening terminates at said stopper layer.

13. The method according to claim 3 , wherein said impurity region is in alignment with said first opening, said compensation region overlapping said impurity region.

14. The method according to claim 3 , wherein a conductivity of the compensation region is opposite to a conductivity of the impurity region.

15. The method according to claim 3 , wherein an impurity-type of the second ions differs from an impurity-type of the first ions.

16. The method according to claim 3 , wherein said second ions are of a P-type impurity.

17. The method according to claim 1 , wherein said first ions are of an N-type impurity.

18. The method according to claim 1 , wherein said first electrically-insulative layer differs from said second electrically-insulative layer.

19. The method according to claim 1 , wherein said first electrically-insulative layer is a silicon oxide.

20. A method of producing a semiconductor device, the method comprising:

a step of forming a first opening through a first electrically-insulative layer, said first electrically-insulative layer being on a semiconductor substrate during the step of forming the first opening;

a step of depositing a second electrically-insulative layer in said first opening, said second electrically-insulative layer being on said semiconductor substrate after the step of depositing the second electrically-insulative layer;

a step of implanting first ions through a second opening and into a compensation region of the semiconductor substrate, said second opening being a space between said first electrically-insulative layer and said second electrically-insulative layer;

a step of depositing a sacrificial film on a sidewall of the first opening prior to the step of depositing the second electrically-insulative layer, said second electrically-insulative layer touching said sacrificial film after the step of depositing the second electrically-insulative layer; and

a step of removing said sacrificial film to form said second opening, said sacrificial film being removed prior to the step of implanting the first ions.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →