IP Library Granted Patent US 9,025,273
Granted Patent B1
US 9,025,273 · App. 14/052,666 · Granted May 5, 2015

Disk drive employing digital accumulators to limit velocity and/or acceleration of microactuator

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Quick Facts
Patent No.
US 9,025,273
App. No.
14/052,666
Granted
May 5, 2015
Kind
B1
Abstract

A disk drive is disclosed comprising a microactuator configured to actuate a head over a disk, and control circuitry comprising a first digital accumulator responsive to a first register. The first digital accumulator generates at least one of a velocity command and a position command for the microactuator, and the control circuitry configures the first register in order to limit at least one of a velocity and an acceleration of the microactuator.

Claims (45)

1. A disk drive comprising:

a disk;

a head;

a microactuator configured to actuate the head over the disk; and

control circuitry comprising a first digital accumulator responsive to a first register, wherein:

the first digital accumulator is configured to generate at least one of a velocity command and a position command for the microactuator;

the control circuitry is configured to program the first register in order to limit at least one of a velocity and an acceleration of the microactuator; and

the first digital accumulator is further configured to integrate a first value based on the first register.

2. The disk drive as recited in claim 1 , wherein the first digital accumulator is configured to integrate the first value based on the first register in order to generate the position command.

3. The disk drive as recited in claim 2 , wherein the first value limits the velocity of the microactuator.

4. The disk drive as recited in claim 1 , wherein the first digital accumulator is configured to integrate the first value based on the first register in order to generate the velocity command.

5. The disk drive as recited in claim 2 , wherein the first value limits the acceleration of the microactuator.

6. The disk drive as recited in claim 1 , wherein the first digital accumulator comprises a counter comprising a step value based on the first register.

7. The disk drive as recited in claim 1 , wherein the disk comprises a plurality of tracks defined by embedded servo sectors and the control circuitry is further configured to:

process the servo sectors at a servo sample rate; and

clock the first digital accumulator at least twice as fast as the servo sample rate.

8. The disk drive as recited in claim 1 , further comprising a second digital accumulator responsive to a second register, wherein the second digital accumulator is configured to generate the velocity command for the microactuator and the control circuitry is further configured to:

configure the first register in order to limit the velocity of the microactuator; and

configure the second register in order to limit the acceleration of the microactuator.

9. The disk drive as recited in claim 8 , wherein:

the second digital accumulator comprises a second counter comprising a second step value based on the second register; and

the first digital accumulator comprises a first counter comprising a first step value based on an output of the second counter.

10. A method of operating a disk drive, the method comprising:

configuring a first digital accumulator to generate at least one of a velocity command and a position command for a microactuator configured to actuate a head over a disk, wherein the first digital accumulator is responsive to a first register; and

configuring the first register in order to limit at least one of a velocity and an acceleration of the microactuator,

wherein the first digital accumulator integrates a first value based on the first register.

11. The method as recited in claim 10 , wherein the first digital accumulator integrates the first value based on the first register in order to generate the position command.

12. The method as recited in claim 11 , wherein the first value limits the velocity of the microactuator.

13. The method as recited in claim 10 , wherein the first digital accumulator integrates the first value based on the first register in order to generate the velocity command.

14. The method as recited in claim 11 , wherein the first value limits the acceleration of the microactuator.

15. The method as recited in claim 10 , wherein the first digital accumulator comprises a counter comprising a step value based on the first register.

16. The method as recited in claim 10 , wherein the disk comprises a plurality of tracks defined by embedded servo sectors and the method further comprises:

processing the servo sectors at a servo sample rate; and

clocking the first digital accumulator at least twice as fast as the servo sample rate.

17. The method as recited in claim 10 , further comprising:

configuring the first register in order to limit the velocity of the microactuator;

configuring a second register of a second digital accumulator in order to limit the acceleration of the microactuator; and

configuring the second digital accumulator to generate the velocity command for the microactuator.

18. The method as recited in claim 17 , wherein:

the second digital accumulator comprises a second counter comprising a second step value based on the second register; and

the first digital accumulator comprises a first counter comprising a first step value based on an output of the second counter.

19. An integrated circuit operable to control a microactuator for actuating a head over a disk in a disk drive, the integrated circuit comprising a first digital accumulator responsive to a first register, wherein:

the first digital accumulator is configured to generate at least one of a velocity command and a position command for the microactuator;

the first register is configured to limit at least one of a velocity and an acceleration of the microactuator; and

the first digital accumulator is configured to integrate a first value based on the first register.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2013
From: FERRIS, TIMOTHY A.; CROWFOOT, JOSEPH J.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 031392/0925 →