IP Library Granted Patent US 9,071,305
Granted Patent B2
US 9,071,305 · App. 14/052,862 · Granted Jun 30, 2015

Timing synchronization for reception of highly-spectrally-efficient communications

Inventor: Amir Eliaz (Moshav Ben Shemen, IL)
Assignee: MagnaCom Ltd.
H04B1/0475H04B1/10H04L23/02H04L27/04H04L27/00H04L27/02H04L25/03178H04L27/01H04L25/03834H04L27/36H04L25/03949H04L7/0087H04L25/03006G06F11/10H04B1/16H04L25/03057H04L25/03305H04L25/03318H04L25/03337H04L1/206H04L25/03038H04B1/709H04L25/03197H04L25/03267H04B2001/0416H04L27/366H04L25/03343H04L25/08H04L1/005H04L1/0054
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,071,305
App. No.
14/052,862
Granted
Jun 30, 2015
Kind
B2
Abstract

Methods and systems are provided for timing synchronization for reception of highly-spectrally efficient communications. An example method may include, filtering, in a receiver, a received inter-symbol correlated (ISC) signal to generate a filtered ISC signal. The method may further include locking to a timing pilot signal of the filtered ISC signal. The timing pilot signal may include a sub-harmonic frequency of a clock signal associated with the received ISC signal. A timing pilot estimate signal of the timing pilot signal may be generated. The timing pilot estimate signal may be cancelled from the filtered partial response signal to generate an output ISC signal. The timing pilot signal includes a signal at ±(1/n*Fbaud), where n is an integer greater than 2, and Fbaud is a symbol rate of the clock signal. The clock signal may be recovered from the filtered ISC signal.

Claims (45)

1. A system comprising:

circuitry for use in an electronic receiver, wherein the circuitry comprises a timing pilot recovery circuit that is operable to:

determine a frequency multiplier of a timing pilot of a received inter-symbol correlated (ISC) signal;

frequency lock to said timing pilot of said received ISC signal to determine a frequency of said timing pilot of said received ISC signal; and

determine a baud rate of said received ISC signal based on said determined frequency multiplier and said frequency of said timing pilot.

2. The system of claim 1 , wherein:

said circuitry comprises a combiner; and

said timing pilot recovery circuit is operable to sample said received ISC signal at a multiple of said determined baud rate and output the resulting samples to said combiner.

3. The system of claim 2 , wherein said circuitry comprises a timing pilot reconstruction circuit that is operable to:

receive said frequency of said timing pilot from said timing pilot recovery circuit;

generate a timing pilot estimate signal based on said frequency of said timing pilot; and

output the timing pilot estimate signal to said combiner.

4. The system of claim 3 , wherein said combiner is operable to:

subtract said timing pilot estimate signal from said timing pilot to generate a difference signal; and

output the difference signal to said timing pilot reconstruction circuit.

5. The system of claim 4 , wherein said timing pilot reconstruction circuit is operable to adjust characteristics of said timing pilot estimate signal based on said difference signal.

6. The system of claim 1 , wherein:

said circuitry is operable to measure at least one performance indicator of said received ISC signal; and

communicate said at least one performance indicator to a transmitter of said received ISC signal.

7. The system of claim 6 , wherein said at least one performance indicator comprises one or more of: a Signal-to-Noise Ratio (SNR), a Symbol Error Rate (SER), a Bit Error Rate (BER), a measurement indicative of timing error variance, a measurement indicative of frequency accuracy of said timing pilot, and a measurement indicative of phase accuracy of said timing pilot.

8. The system of claim 6 , wherein said determine said frequency multiplier is based on said at least one performance indicator.

9. The system of claim 6 , wherein, as part of said determine said frequency multiplier, said circuitry is operable to receive said frequency multiplier from a transmitter during pairing of said transmitter with said receiver.

10. The system of claim 1 , wherein said received ISC signal is a partial response signal generated via a partial response pulse shaping filter of a transmitter.

11. A method comprising:

performing by a timing pilot recovery circuit of an electronic receiver:

determining a frequency multiplier of a timing pilot of a received inter-symbol correlated (ISC) signal;

frequency locking to said timing pilot of said received ISC signal to determine a frequency of said timing pilot of said received ISC signal; and

determining a baud rate of said received ISC signal based on said determined frequency multiplier and said frequency of said timing pilot.

12. The method of claim 11 , wherein said timing pilot recovery circuit comprises a combiner and the method comprises:

said timing pilot recovery circuit sampling said received ISC signal at a multiple of said determined baud rate and outputting the resulting samples to said combiner.

13. The method of claim 12 , wherein said timing pilot recovery circuit comprises a timing pilot reconstruction circuit and the method comprises:

receiving said frequency of said timing pilot from said timing pilot recovery circuit;

generating a timing pilot estimate signal based on said frequency of said timing pilot; and

outputting the timing pilot estimate signal to said combiner.

14. The method of claim 13 , comprising:

subtracting, by said combiner, said timing pilot estimate signal from said timing pilot to generate a difference signal; and

outputting, by said combiner, the difference signal to said timing pilot reconstruction circuit.

15. The method of claim 14 , comprising adjusting, by said timing pilot recovery circuit, characteristics of said timing pilot estimate signal based on said difference signal.

16. The method of claim 11 , comprising:

measuring, by circuitry of said receiver, at least one performance indicator of said received ISC signal; and

communicating, by circuitry of said receiver, said at least one performance indicator to a transmitter of said received ISC signal.

17. The method of claim 16 , wherein said at least one performance indicator comprises one or more of: a Signal-to-Noise Ratio (SNR), a Symbol Error Rate (SER), a Bit Error Rate (BER), a measurement indicative of timing error variance, a measurement indicative of frequency accuracy of said timing pilot, and a measurement indicative of phase accuracy of said timing pilot.

18. The method of claim 16 , comprising determining said frequency multiplier based on said at least one performance indicator.

19. The method of claim 16 , comprising receiving said frequency multiplier from a transmitter during pairing of said transmitter with said receiver.

20. The method of claim 11 , wherein said received ISC signal is a partial response signal generated via a partial response pulse shaping filter of a transmitter.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2017
From: MAGNACOM LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041604/0861 →
Continuity (6)
Continuation 13755011 · Jan 31, 2013
Provisional Application 61662085 · Jun 20, 2012
Provisional Application 61726099 · Nov 14, 2012
Provisional Application 61729774 · Nov 26, 2012
Provisional Application 61747132 · Dec 28, 2012
Related Publication 20140105332A1 · Apr 17, 2014