Managed-NAND with embedded random-access non-volatile memory
View Patent ↗Systems and methods embed a random-access non-volatile memory array in a managed-NAND system to execute the boot code or other time-sensitive applications. By embedding this random-access non-volatile memory in the managed-NAND system, either on the memory controller chip or as a separate chip within the managed-NAND system package, an application may be read with fast initial access time, alleviating the slow access time limitations of NAND Flash technology. Depending on the size of the application, the system may be configured to read the whole application content or only a time-critical portion from this embedded random-access non-volatile memory array.
1. A method comprising:
mapping a random-access non-volatile memory address into an address map of a memory controller;
partitioning an application into a latency-critical portion and a latency-non-critical portion;
storing the latency-critical portion in a random-access non-volatile memory array embedded within the memory controller and the latency-non-critical portion in a NAND memory array;
issuing a read command from an application processor to the memory controller;
copying data content of the latency-non-critical portion from the NAND memory array to an external volatile memory;
reading the latency-critical portion of the application in the embedded random-access nonvolatile memory; and
reading the latency-non-critical portion of the application in the external volatile memory.
2. The method of claim 1 , further comprising permitting legacy mode operation.
3. The method of claim 1 , further comprising mapping an address range of the embedded random-access non-volatile memory array into a memory space of a central processing unit of the application processor, the application processor having direct low-latency access to addresses in the embedded random-access non-volatile memory.