IP Library Patent Application 14070020
Patent Application
App. No. 14/070,020

MEMORY SYSTEM

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Quick Facts
Patent No.
US None
App. No.
14/070,020
Abstract

According to the embodiments, a memory system includes a nonvolatile semiconductor memory and a writing-loop-count monitoring unit that monitors a loop count of an applied voltage to the nonvolatile semiconductor memory required for data writing of the nonvolatile semiconductor memory as a writing loop count. Moreover, the memory system includes a management table for managing the writing loop count in block unit that is a unit of data erasing and a life managing unit that determines a degraded state of the nonvolatile semiconductor memory based on the management table.

Claims (47)

1 . (canceled)

2 . A system comprising:

a memory system; and

a management unit to be installed in a host with a display device to be connected to the memory system,

the memory system comprising:

a semiconductor nonvolatile memory which includes a plurality of blocks as a unit of data erasing;

a nonvolatile random access memory; and

a controller configured to control the semiconductor nonvolatile memory and the nonvolatile random access memory, wherein

the nonvolatile random access memory is configured to store a first information related to a degraded state of the semiconductor nonvolatile memory, and

the management unit is configured to cause the display device to display a warning based upon the first information.

3 . The system according to claim 2 , wherein

the management unit is configured to cause the display device to display a first warning based upon the first information, and when degradation has progressed, configured to cause the display device to further display a second warning that indicates a life of the memory system becomes shorter based upon the first information.

4 . The system according to claim 2 , wherein

the management unit is configured to determine which degraded stage the degraded state is among a plurality of degraded stages, and cause the display device to display a third warning that indicates the determined degraded stage.

5 . The system according to claim 3 , wherein

the semiconductor nonvolatile memory is a NAND flash memory.

6 . The system according to claim 5 , wherein

the first information is managed in block units in the semiconductor nonvolatile memory.

7 . The system according to claim 6 , wherein

the first information includes a loop count at a time of erasing in the semiconductor nonvolatile memory for each block unit.

8 . The system according to claim 6 , wherein

the first information includes a loop count at a time of writing in the semiconductor nonvolatile memory for each block unit.

9 . The system according to claim 6 , wherein

the nonvolatile random access memory is a FeRAM.

10 . The system according to claim 6 , wherein

the nonvolatile random access memory is a MRAM.

11 . A method of managing a memory system which is connected to a host with a display device and includes a semiconductor nonvolatile memory and a nonvolatile random access memory, the semiconductor nonvolatile memory including a plurality of blocks as a unit of data erasing, the method comprising:

controlling the semiconductor nonvolatile memory and the nonvolatile random access memory;

storing a first information related to a degraded state of the semiconductor nonvolatile memory, in the s nonvolatile random access memory; and

displaying a warning based upon the first information.

12 . The method according to claim 11 , further comprising:

displaying a first warning based upon the first information, and when degradation has progressed, further displaying a second warning that indicates a life of the memory system becomes shorter based upon the first information.

13 . The method according to claim 11 , further comprising:

determining which degraded stage the degraded state is among a plurality of degraded stages, and

displaying a third warning that indicates the determined degraded stage.

14 . The method according to claim 12 , wherein

the semiconductor nonvolatile memory is a NAND flash memory.

15 . The method according to claim 14 , further comprising:

managing the first information in block units in the semiconductor nonvolatile memory,

16 . The method according to claim 15 , wherein

the first information includes a loop count at a time of erasing in the semiconductor nonvolatile memory for each block unit.

17 . The method according to claim 15 , wherein

the first information includes a loop count at a time of writing in the semiconductor nonvolatile memory for each block unit.

18 . The method according to claim 15 , wherein

the nonvolatile random access memory is a FeRAM.

19 . The method according to claim 15 , wherein

the nonvolatile random access memory is a MRAM.