IP Library Granted Patent US 9,123,584
Granted Patent B2
US 9,123,584 · App. 14/072,406 · Granted Sep 1, 2015

In-line metrology system

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Quick Facts
Patent No.
US 9,123,584
App. No.
14/072,406
Granted
Sep 1, 2015
Kind
B2
Abstract

A metrology system for gauging and spatially mapping a semiconductor material on a substrate can be used in controlling deposition and thermal activation processes.

Claims (20)

1. A method of manufacturing a photovoltaic device gauging and spatially mapping a semiconductor material on a substrate during a semiconductor film deposition and anneal process comprising:

transporting a substrate on a conveyor;

depositing a semiconductor material on the substrate;

annealing the semiconductor material on the substrate;

generating an optical radiation to illuminate a portion of the semiconductor material;

measuring the optical property of the semiconductor material; and

analyzing the measurement data to obtain the information on the band gap, absorption edge, surface roughness and thickness of the semiconductor material.

2. The method of claim 1 , further comprising estimating of device performance based on the sensor measurement and a predictive model.

3. The method of any one of claim 1 , further comprising measuring the impurity percentage in the semiconductor material.

4. The method of any one of claim 1 , further comprising measuring the refractive index of the semiconductor material.

5. The method of any one of claim 1 , wherein the semiconductor material comprises an inter-diffused bilayer of semiconductor material.

6. The method of any one of claim 1 , further comprising adjusting the semiconductor material deposition and anneal process when it drifts from its purported baseline with a feed-back control loop.

7. The method of any one of claim 1 , further comprising adjusting the measured location of the semiconductor material for spatially mapping a semiconductor material.

8. The method of any one of claim 1 , further comprising utilizing the band-gap measured in the semiconductor material to control electrical junction formation of a semiconductor device and affect the performance of the semiconductor device.

9. The method of claim 2 , further comprising measuring the impurity percentage in the semiconductor material.

10. The method of claim 2 , further comprising measuring the refractive index of the semiconductor material.

11. The method of claim 2 , wherein the semiconductor material comprises an inter-diffused bilayer of semiconductor material.

12. The method of claim 2 , further comprising adjusting the semiconductor material deposition and anneal process when it drifts from its purported baseline with a feed-back control loop.

13. The method of claim 2 , further comprising adjusting the measured location of the semiconductor material for spatially mapping a semiconductor material.

14. The method of claim 2 , further comprising utilizing the band-gap measured in the semiconductor material to control electrical junction formation of a semiconductor device and affect the performance of the semiconductor device.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Feb 13, 2026
From: JPMORGAN CHASE BANK, N.A.
To: FIRST SOLAR, INC.
Reel/Frame 074858/0364 →
SECURITY INTEREST Recorded Jul 10, 2023
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 064237/0462 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 15, 2021
From: JPMORGAN CHASE BANK, N.A.
To: FIRST SOLAR, INC.
Reel/Frame 058132/0566 →
PATENT SECURITY AGREEMENT Recorded Jul 12, 2017
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 043177/0581 →