IP Library Granted Patent US 8,841,680
Granted Patent B2
US 8,841,680 · App. 14/072,843 · Granted Sep 23, 2014

Semiconductor device

Inventor: Hajime Kimura (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,841,680
App. No.
14/072,843
Granted
Sep 23, 2014
Kind
B2
Abstract

Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor ( 105 ), a charge equivalent to a threshold value of a TFT ( 104 ) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor ( 105 ) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT ( 101 ). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT ( 101 ).

Claims (44)

1. A semiconductor device comprising:

first, second, third and fourth transistors and a capacitor;

wherein the first, second, third and fourth transistors are the same conductivity type,

wherein a first electrode of the capacitor is electrically connected to a gate of the first transistor,

wherein the first electrode of the capacitor is electrically connected to a gate of the fourth transistor,

wherein the first electrode of the capacitor is electrically connected to one of source and drain of the third transistor,

wherein a second electrode of the capacitor is electrically connected to one of source and drain of the fourth transistor,

wherein a gate of the second transistor is electrically connected to a first signal input terminal,

wherein one of source and drain of the first transistor is electrically connected to a signal output terminal,

wherein the one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor,

wherein the one of source and drain of the first transistor is electrically connected to the other of source and drain of the third transistor, and

wherein the other of source and drain of the second transistor is electrically connected to a first power supply line.

2. The semiconductor device according to claim 1 , wherein the second electrode of the capacitor is electrically connected to a second signal input terminal.

3. The semiconductor device according to claim 1 , wherein a gate of the third transistor is electrically connected to the other of source and drain of the third transistor.

4. The semiconductor device according to claim 1 , wherein the one of source and drain of the fourth transistor is electrically connected to a second signal input terminal.

5. The semiconductor device according to claim 1 , wherein the other of source and drain of the first transistor is electrically connected to a second power supply line.

6. The semiconductor device according to claim 1 , wherein the other of source and drain of the fourth transistor is electrically connected to the gate of the fourth transistor.

7. The semiconductor device according to claim 1 , wherein said conductivity type is an n-channel type.

8. A display device comprising the semiconductor device according to claim 1 , wherein the display device comprises a display element.

9. A display module comprising the display device according to claim 8 , wherein the display module comprises a flexible printed circuit.

10. Electric equipment comprising the display module according to claim 9 , wherein the electric equipment includes at least one of a battery, an image receiving portion, an audio input portion, an audio output portion and antenna.

11. A semiconductor device comprising:

first, second, third and fourth transistors and a capacitor;

wherein the first, second, third and fourth transistors are the same conductivity type,

wherein a first electrode of the capacitor is directly connected to a gate of the first transistor,

wherein the first electrode of the capacitor is electrically connected to a gate of the fourth transistor,

wherein the first electrode of the capacitor is directly connected to one of source and drain of the third transistor,

wherein a second electrode of the capacitor is directly connected to one of source and drain of the fourth transistor,

wherein a gate of the second transistor is directly connected to a first signal input terminal,

wherein one of source and drain of the first transistor is directly connected to a signal output terminal,

wherein the one of source and drain of the first transistor is electrically connected to one of source and drain of the second transistor,

wherein the one of source and drain of the first transistor is electrically connected to the other of source and drain of the third transistor,

wherein the other of source and drain of the second transistor is electrically connected to a first power supply line,

wherein the one of source and drain of the second transistor is directly connected to the signal output terminal, and

wherein the other of source and drain of the third transistor is directly connected to the signal output terminal.

12. The semiconductor device according to claim 11 , wherein the second electrode of the capacitor is electrically connected to a second signal input terminal.

13. The semiconductor device according to claim 11 , wherein a gate of the third transistor is electrically connected to the other of source and drain of the third transistor.

14. The semiconductor device according to claim 11 , wherein the one of source and drain of the fourth transistor is electrically connected to a second signal input terminal.

15. The semiconductor device according to claim 11 , wherein the other of source and drain of the first transistor is electrically connected to a second power supply line.

16. The semiconductor device according to claim 11 , wherein the other of source and drain of the fourth transistor is electrically connected to the gate of the fourth transistor.

17. The semiconductor device according to claim 11 , wherein said conductivity type is an n-channel type.

18. A display device comprising the semiconductor device according to claim 11 , wherein the display device comprises a display element.

19. A display module comprising the display device according to claim 18 , wherein the display module comprises a flexible printed circuit.

20. Electric equipment comprising the display module according to claim 19 , wherein the electric equipment includes at least one of a battery, an image receiving portion, an audio input portion, an audio output portion and antenna.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2014
From: KIMURA, HAJIME
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 032459/0743 →
Priority Claims (1)
JP 2001-243984 · Aug 10, 2001 · national
Continuity (5)
Continuation 13483080 · May 30, 2012
Continuation 12630869 · Dec 4, 2009
Continuation 10914081 · Aug 10, 2004
Continuation 10198693 · Jul 16, 2002
Related Publication 20140048811A1 · Feb 20, 2014