IP Library Granted Patent US 9,231,628
Granted Patent B2
US 9,231,628 · App. 14/074,878 · Granted Jan 5, 2016

Low-complexity, highly-spectrally-efficient communications

Inventor: Amir Eliaz (Moshav Ben Shemen, IL)
Assignee: MagnaCom Ltd.
H04B1/0475G06F11/10H04B1/10H04B1/16H04B1/709H04B17/008H04B17/15H04L1/005H04L1/0036H04L1/0048H04L1/0054H04L1/203H04L1/206H04L7/0058H04L7/0087H04L7/02H04L23/02H04L25/0236H04L25/03006H04L25/0328H04L25/03038H04L25/03057H04L25/03178H04L25/03197H04L25/03267H04L25/03305H04L25/03318H04L25/03337H04L25/03343H04L25/03834H04L25/03885H04L25/03949H04L25/08H04L27/00H04L27/01H04L27/02H04L27/04H04L27/36H04L27/366H04L27/368H04L27/38H04B2001/0416
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Quick Facts
Patent No.
US 9,231,628
App. No.
14/074,878
Granted
Jan 5, 2016
Kind
B2
Abstract

A system may comprise circuitry that includes a sequence estimation circuit and a non-linearity modeling circuit. The circuitry may be operable to receive a single-carrier signal that was generated by passage of symbols through a partial response filter and through a non-linear circuit. The circuitry may be operable to generate estimated values of the symbols using the sequence estimation circuit and using the non-linearity modeling circuit. An output of the non-linearity modeling circuit may be equal to a corresponding input of the non-linearity modeling circuit modified according to a non-linear model that approximates the non-linearity of the non-linear circuit through which the received signal passed.

Claims (49)

1. A method comprising:

in a receiver comprising a sequence estimation circuit:

receiving a first sample of a first signal;

generating, by said sequence estimation circuit, a first symbol vector based on said first sample of said first signal;

generating a partial response feedback signal based on said first symbol vector;

receiving a second sample of said first signal;

non-linearly distorting said partial response feedback signal; and

processing said second sample of said first signal based on said non-linearly-distorted partial response feedback signal.

2. The method of claim 1 , wherein:

said first signal is non-linearly-distorted as a result of non-linearity of a signal path;

said receiver comprises a non-linearity modeling circuit; and

said method comprises determining, via said non-linearity modeling circuit, a model of said non-linearity of said signal path.

3. The method of claim 2 , wherein said model of said non-linearity of said signal path is represented as a polynomial or exponential expression.

4. The method of claim 1 , wherein symbols of said first symbol vector are N-QAM symbols and N is an integer.

5. The method of claim 1 , wherein said generating said partial response feedback signal comprises performing the following:

convolving said first symbol vector with a plurality of tap coefficients.

6. The method of claim 5 , wherein said generating said first symbol vector comprises performing the following:

generating a plurality of metrics, each one of said plurality of metrics corresponding to one of a plurality of candidate symbol vectors;

selecting one of said plurality of candidate symbol vectors based on said plurality of metrics; and

outputting said selected one of said plurality of candidate symbol vectors as said first symbol vector.

7. The method of claim 6 , wherein each of said plurality of metrics is based on a Euclidean distance.

8. The method of claim 1 , comprising non-linearly distorting said partial response feedback signal by applying said model of said non-linearity of said signal path to said partial response feedback signal.

9. The method of claim 1 , wherein said processing said second sample comprises one or both of:

equalizing; and

recovering a carrier frequency.

10. A system comprising:

a receiver comprising a sequence estimation circuit, wherein said receiver is operable to:

receive a first sample of a first signal;

generate, by said sequence estimation circuit, a first symbol vector based on said first sample of said first signal;

generate a partial response feedback signal based on said first symbol vector;

receive a second sample of said first signal;

non-linearly distort said partial response feedback signal; and

process said second sample of said first signal based on said non-linearly-distorted partial response feedback signal.

11. The system of claim 10 , wherein:

said first signal is non-linearly-distorted as a result of non-linearity of a signal path;

said receiver comprises a non-linearity modeling circuit; and

said receiver is operable to determine, via said non-linearity modeling circuit, a model of said non-linearity of said signal path.

12. The system of claim 11 , wherein said model of said non-linearity of said signal path is represented as a polynomial or exponential expression.

13. The system of claim 10 , wherein symbols of said first symbol vector are N-QAM symbols and N is an integer.

14. The system of claim 10 , wherein said generation of said partial response feedback signal comprises convolution of said first symbol vector with a plurality of tap coefficients.

15. The system of claim 14 , wherein said generation of said first symbol vector comprises:

generation of a plurality of metrics, each one of said plurality of metrics corresponding to one of a plurality of candidate symbol vectors;

selection of one of said plurality of candidate symbol vectors based on said plurality of metrics; and

output of said selected one of said plurality of candidate symbol vectors as said symbol vector.

16. The system of claim 15 , wherein each of said plurality of metrics is based on a Euclidean distance.

17. The system of claim 1 , wherein said receiver is operable to non-linearly distort said partial response feedback signal by application of said model of said non-linearity of said signal path to said partial response feedback signal.

18. The system of claim 10 , wherein said processing of said second sample comprises one or both of:

equalization; and

carrier frequency recovery.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2017
From: MAGNACOM LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041604/0861 →
Continuity (6)
Continuation 13754964 · Jan 31, 2013
Provisional Application 61662085 · Jun 20, 2012
Provisional Application 61726099 · Nov 14, 2012
Provisional Application 61729774 · Nov 26, 2012
Provisional Application 61747132 · Dec 28, 2012
Related Publication 20140133540A1 · May 15, 2014