IP Library Granted Patent US 9,255,961
Granted Patent B2
US 9,255,961 · App. 14/080,844 · Granted Feb 9, 2016

Semiconductor integrated circuit, operating method of semiconductor integrated circuit, and debug system

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Quick Facts
Patent No.
US 9,255,961
App. No.
14/080,844
Granted
Feb 9, 2016
Kind
B2
Abstract

A current measurement unit measuring power supply currents each consumed in a plurality of circuit blocks of which at least one of the circuit blocks includes a processor, and outputting the measurement result as the power supply current values. A selection unit selecting at least one of the power supply current values according to selection information. A trace buffer sequentially holding the power supply current values being selected by the selection unit together with execution information of the processor, and sequentially outputting the held information. By selecting the power supply current values of the circuit blocks required for debugging according to the selection information, the number of external terminals of a semiconductor integrated circuit required for the debugging which includes tracing the power supply current values may be reduced. As a result, a chip size of the semiconductor integrated circuit with a debug function may be reduced.

Claims (33)

1. A semiconductor device, comprising:

a current measurement unit configured to measure a power supply current consumed in each of a plurality of circuit blocks and to output a plurality of measurement results corresponding to the plurality of circuit blocks;

a selection unit configured to select one of the plurality of measurement results according to selection information; and

a buffer configured to receive and store the selected measurement result.

2. The device of claim 1 , wherein the buffer is configured to store execution history information associated with the selected measurement result.

3. The device of claim 1 , further comprising a counter configured to generate the selection information.

4. The device of claim 1 , further comprising a selection register configured to store the selection information.

5. The device of claim 4 , wherein the selection unit is configured to select the measurement result based on the selection information stored in the selection register.

6. The device of claim 4 , wherein the selection register is configured to receive selection information from an external debugging apparatus.

7. The device of claim 1 , further comprising an additional current measurement unit configured to measure a power supply current of an additional circuit block and to output an additional measurement result.

8. The device of claim 7 , wherein the buffer is further configured to sequentially output the selected measurement result and the additional measurement result.

9. The device of claim 7 , wherein the selection unit is configured to add the measurement result and the additional measurement result based on selection information.

10. The device of claim 9 , wherein the buffer is further configured to store the additional measurement result.

11. A method, comprising:

measuring a power supply current consumed by each of a plurality of circuit blocks and to output a plurality of measurement results corresponding to the plurality of circuit blocks;

selecting one of the plurality of measurement results according to selection information; and

storing the selected measurement result in a buffer.

12. The method of claim 11 , further comprising:

storing execution history associated with the selected measurement result in the buffer.

13. The method of claim 11 , further comprising generating the selection information using a counter.

14. The method of claim 11 , further comprising storing the selection information in a selection register.

15. The method of claim 14 , selecting the measurement result comprises selecting the measurement result based on the selection information stored in the selection register.

16. The method of claim 14 , receiving the selection information from an external debugging apparatus.

17. The method of claim 11 , further comprising:

measuring a power supply current of an additional circuit block and outputting an additional measurement result.

18. The method of claim 17 , further comprising outputting the selected measurement result and the additional measurement result from the buffer.

19. The method of claim 17 , further comprising adding the measurement result and the additional measurement result based on selection information.

20. The method of claim 19 , further comprising storing the additional measurement result in the buffer.

21. A semiconductor device, comprising:

a current measurement unit configured to measure a power supply current consumed in a circuit block and to output a measurement result;

a selection unit configured to select the measurement result according to selection information;

a buffer configured to receive and store the selected measurement result; and

an additional current measurement unit configured to measure a power supply current of an additional circuit block and to output an additional measurement result.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →