IP Library Granted Patent US 9,331,846
Granted Patent B2
US 9,331,846 · App. 14/080,865 · Granted May 3, 2016

Communication method and reception apparatus

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Quick Facts
Patent No.
US 9,331,846
App. No.
14/080,865
Granted
May 3, 2016
Kind
B2
Abstract

An electronic device that digitizes a baseband signal obtained from a received high-frequency signal; specifies a position of a preamble included in the digitalized signal; calculates a square of the preamble; specifies a peak from a value obtained by the square of the preamble; performs a fast Fourier transform (FFT) on the baseband signal using a position of the peak as a start of an FFT window; extracts phases of a plurality of frequency components for phase measurement from the baseband signal which has been subjected to the FFT; obtains a phase difference of the plurality of phases; and obtains a phase correction value of a reception signal using the phase difference and a phase reference.

Claims (64)

1. An electronic device comprising:

a first antenna configured to receive a first high-frequency signal;

a second antenna configured to receive a second high-frequency signal: and

circuitry configured to:

generate a first digitized baseband signal from the first high-frequency signal;

generate a second digitized baseband signal from the second high-frequencv signal;

specify a position of a preamble included in the first digitalized baseband signal;

calculate a square signal of an autocorrelation of the preamble;

specify a peak value obtained by the square signal of the autocorrelation of the preamble;

perform a fast Fourier transform (FFT) on the first digitized baseband signal using a position of the peak value as a start of an FFT window;

extract a plurality of phases of a plurality of frequency components for phase measurement from the first digitized baseband signal which has been subjected to the FFT;

obtain a phase difference of the plurality of phases;

determine a relative delay between the first high-frequency signal and the second high-frequency signal based on the phase difference and a phase reference; and

demodulate the first digitized baseband signal and the second digitized baseband signal based on the relative delay.

2. The electronic device of claim 1 , wherein the plurality of frequency components includes a first frequency component (f 0 ), a second frequency component (f 1 ) and a third frequency component (f 2 ).

3. The electronic device of claim 2 , wherein the circuitry is configured to obtain the phase difference according to the following formula:

Phase Difference =[((Phase of f1)−(Phase of f0))/(f1−f0)]×(f2−f0)−(Phase of f2).

4. The electronic device of claim 3 , wherein the circuitry is configured to obtain the phase reference according to the following formula:

Phase Reference =(360×f0)/inverse fast Fourier transform (IFFT) size.

5. The electronic device of claim 4 , wherein the circuitry is configured to determine the relative delay based on a phase correction value obtained according to the following formula:

Phase Correction Value =mod(Phase Difference/Phase Reference), wherein

mod denotes a residue of the division between the phase difference and the phase reference.

6. The electronic device of claim 2 , wherein the first frequency component (f 0 ), the second frequency component (f 1 ) and the third frequency component (f 2 ) are each assigned to a same preamble time slot in the first high-frequency signal.

7. The electronic device of claim 1 , wherein the plurality of frequency components includes a first frequency component (f 0 ) and a second frequency component (f 2 ).

8. The electronic device of claim 7 , wherein the circuitry is configured to obtain the phase difference according to the following formula:

Phase Difference =(Phase of f0)−(Phase of f2).

9. The electronic device of claim 8 , wherein the circuitry is configured to obtain the phase reference according to the following formula:

Phase Reference =(360×f0)/inverse fast Fourier transform (IFFT) size.

10. The electronic device of claim 9 , wherein the circuitry is configured to determine the relative delay based on a phase correction value obtained according to the following formula:

Phase Correction Value =mod(Phase Difference/Phase Reference), wherein

mod denotes a residue of the division between the phase difference and the phase reference.

11. The electronic device of claim 7 , wherein the first frequency component (f 0 ) and the second frequency component (f 2 ) are each assigned to a same preamble time slot in the first high-frequency signal.

12. The electronic device of claim 7 , wherein the first frequency component (f 0 ) and the second frequency component (f 2 ) are each assigned to consecutive time slots in the first high-frequency signal.

13. A method performed by an electronic device, the method comprising:

receiving a first high-frequency signal through a first antenna; receiving a second high-frequency signal through a second antenna;

generating a first digitized baseband signal from the first high-frequency signal;

generating a second digitized baseband signal from the second high-frequency signal;

specifying a position of a preamble included in the first digitalized baseband signal;

calculating a square signal of an autocorrelation of the preamble;

specifying a peak value obtained by the square signal of the autocorrelation of the preamble;

performing a fast Fourier transform (FFT) on the first digitized baseband signal using a position of the peak value as a start of an FFT window;

extracting, by circuitry of the electronic device, a plurality of phases of a plurality of frequency components for phase measurement from the first digitized baseband signal which has been subjected to the FFT;

obtaining, by the circuitry, a phase difference of the plurality of phases;

determining a relative delay between the first high-frequency signal and the second high-frequency signal based on the phase difference and a phase reference; and

demodulating the first digitized baseband signal and the second digitized baseband signal based on the relative delay.

14. The method of claim 13 , wherein the plurality of frequency components includes a first frequency component (f 0 ), a second frequency component (f 1 ) and a third frequency component (f 2 ).

15. The method according to claim 14 , wherein the phase difference is obtained according to the following formula:

Phase Difference =[((Phase of f1)−(Phase of f0))/(f1−f0)]×(f2−f0)−(Phase of f2),

the phase reference is obtained according to the following formula:

Phase Reference =(360×f0)/inverse fast Fourier transform (IFFT) size, and

the relative delay is determined based on a phase correction value obtained according to the following formula:

Phase Correction Value =mod(Phase Difference/Phase Reference), wherein

mod denotes a residue of the division between the phase difference and the phase reference.

16. The method according to claim 14 , wherein the first frequency component (f 0 ), the second frequency component (f 1 ) and the third frequency component (f 2 ) are each assigned to a same preamble time slot in the first high-frequency signal.

17. The method of claim 13 , wherein the plurality of frequency components includes a first frequency component (f 0 ) and a second frequency component (f 2 ).

18. The method according to claim 17 , wherein

the phase difference is obtained according to the following formula:

Phase Difference =(Phase of f0)−(Phase of f2),

the phase reference is obtained according to the following formula:

Phase Reference =(360×f0)/inverse fast Fourier transform (IFFT) size, and

the relative delay is determined based on a phase correction value obtained according to the following formula:

Phase Correction Value =mod(Phase Difference/Phase Reference), wherein

mod denotes a residue of the division between the phase difference and the phase reference.

19. The method according to claim 17 , wherein the first frequency component (f 0 ) and the second frequency component (f 2 ) are each assigned to a same preamble time slot in the first high-frequency signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2019
From: SONY MOBILE COMMUNICATIONS, INC.
To: SONY CORPORATION
Reel/Frame 048691/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2017
From: SONY CORPORATION
To: SONY MOBILE COMMUNICATIONS INC.
Reel/Frame 043943/0631 →