Spread-spectrum phase locked loop circuit and method
View Patent ↗A phase locked loop (PLL) circuit and a method thereof are provided. In an embodiment, the PLL circuit includes: a switched capacitor circuit, in which the switched capacitor circuit generates a modulation waveform, and the modulation waveform is injected into the PLL circuit in a current form, so that a PLL output frequency is modulated. Compared with the spread spectrum phase locked loop (SS-PLL) in the prior art, the SS-PLL in embodiments of the present invention is simple in structure, low in power consumption, low in silicon overhead, and flexible both in spreading factor and modulation frequency.
1. A spread spectrum phase locked loop (PLL) circuit, comprising:
a spread spectrum clock generator (SSCG) including a switched capacitor circuit located in the SSCG, a first current source and a second current source,
wherein the SSCG is configured to periodically and alternately select signals corresponding to the first current source and the second current source, respectively, with a frequency lower than a feedback clock signal,
the switched capacitor circuit is configured to perform low pass filtering on the selected signals to generate a modulation waveform,
wherein an output of the spread spectrum phase locked loop (PLL) circuit is modulated.
2. A spread spectrum phase locked loop (PLL) circuit, comprising:
a spread spectrum clock generator (SSCG) including a switched capacitor circuit located in the SSCG, the SSCG further has a first current source, a second current source, a capacitor, and an amplifier,
wherein the second current source, the amplifier and the capacitor are connected to form an integrator;
the SSCG is configured to periodically and alternately select corresponding to the first current source and the second current source, respectively, with a frequency lower than a feedback clock signal, to be used as positive and negative input signals of the integrator; and
an output signal of the integrator has a modulation waveform.
3. A spread spectrum phase locked loop (PLL) circuit, comprising:
a spread spectrum clock generator (SSCG) including a switched capacitor circuit, wherein the switched capacitor circuit generates a modulation waveform, and the modulation waveform is injected into the PLL circuit in a current form, so that a PLL output frequency is modulated;
wherein the SSCG further comprises a current source, and the SSCG is configured to compare the modulation waveform with a current of the third current source to obtain a difference signal, and
the loop filter circuit modulates the difference signal to a control voltage.
4. The spread spectrum PLL circuit according to claim 3 , wherein the SSCG further comprises a transistor having a gate for receiving the filtered signals, and having a drain for receiving the current of the third current source.
5. The spread spectrum PLL circuit according to claim 1 , wherein the modulation waveform is a triangular wave.
6. The spread spectrum PLL circuit according to claim 1 , further comprising:
a charge pump circuit (CP) for switching release and inhalation of charge and discharge currents according to a phase difference between a feedback clock signal of an output clock signal of the PLL circuit and a reference clock signal;
a loop filter circuit (LPF), having a filter capacitor, wherein the filter capacitor is charged and discharged by the charge and discharge currents and generates a control voltage; and
a voltage controlled oscillator (VCO), for oscillating with a frequency corresponding to the control voltage.
7. A spectrum spreading method of a phase locked loop (PLL) circuit, comprising:
generating a modulation waveform with the switched capacitor circuit according to claim 2 ; and
injecting the modulation waveform into the PLL circuit according to claim 3 in a current form so that a PLL output frequency is modulated.