Active area shaping of III-nitride devices utilizing steps of source-side and drain-side field plates
View Patent ↗In an exemplary implementation, a III-nitride semiconductor device includes a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas. The III-nitride semiconductor device further includes a gate well formed in a dielectric body, the dielectric body situated over the III-nitride heterojunction. A gate arrangement is situated in the gate well and includes a gate electrode, a source-side field plate, and a drain-side field plate. The source-side field plate and the drain-side field plate each include one or more steps, where the drain-side field plate has a different number of the one or more steps than the source-side field plate.
1. A III-nitride semiconductor device comprising:
a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas;
a gate well formed in a dielectric body, said dielectric body situated over said III-nitride heterojunction, said first III-nitride body being interposed between said dielectric body and said second III-nitride body;
a gate arrangement situated in said gate well and comprising a gate electrode, a source-side field plate, and a drain-side field plate;
said source-side field plate and said drain-side field plate each comprising one or more steps, wherein said drain-side field plate has a greater number of said one or more steps than said source-side field plate.
2. The III-nitride semiconductor device of claim 1 , wherein said one or more steps are defined by said dielectric body.
3. The III-nitride semiconductor device of claim 1 , wherein said one or more steps are defined by dielectric segments of said dielectric body.
4. The III-nitride semiconductor device of claim 1 , wherein said one or more steps are defined by ledges of said dielectric body.
5. The III-nitride semiconductor device of claim 1 , wherein said dielectric body comprises dielectric segments and said source-side field plate and said drain-side field plate are situated over said dielectric segments.
6. The III-nitride semiconductor device of claim 1 , wherein corresponding ones of said one or more steps of said source-side field plate and said one or more steps of said drain-side field plate are situated on a common dielectric layer.
7. The III-nitride semiconductor device of claim 1 , wherein said dielectric body comprises at least one silicon nitride layer and at least one silicon oxide layer.
8. The III-nitride semiconductor device of claim 1 , wherein said source-side field plate and said drain-side field plate are integrated with said gate electrode.
9. The III-nitride semiconductor device of claim 1 , wherein said drain-side field plate is wider than said source-side field plate.
10. A III-nitride semiconductor device comprising:
a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas;
a gate well formed in a dielectric body, said dielectric body situated over said III-nitride heterojunction and comprising dielectric segments, said first III-nitride body being interposed between said dielectric body and said second III-nitride body;
a gate arrangement situated in said gate well and comprising a gate electrode, a source-side field plate, and a drain-side field plate;
said source-side field plate and said drain-side field plate each comprising one or more steps situated over said dielectric segments, wherein said drain-side field plate is situated over a greater number of said dielectric segments than said source-side field plate.
11. The III-nitride semiconductor device of claim 10 , wherein said drain-side field plate has a different number of said one or more steps than said source-side field plate.
12. The III-nitride semiconductor device of claim 10 , wherein said one or more steps are defined by said dielectric segments.
13. The III-nitride semiconductor device of claim 10 , wherein a respective one of said one or more steps are situated on each of said dielectric segments.
14. The III-nitride semiconductor device of claim 10 , wherein said source-side field plate is situated over source-side dielectric segments and said drain-side field plate is situated over drain side dielectric segments.
15. The III-nitride semiconductor device of claim 14 , wherein corresponding ones of said source-side and drain-side dielectric segments are of a common dielectric layer.
16. The III-nitride semiconductor device of claim 10 , wherein said drain-side field plate has more of said one or more steps than said source-side field plate.
17. The III-nitride semiconductor device of claim 10 , wherein said gate well is defined by said dielectric segments.
18. The III-nitride semiconductor device of claim 10 , wherein said drain-side field plate is wider than said source-side field plate.
19. The III-nitride semiconductor device of claim 10 , wherein at least one of said dielectric segments comprises silicon nitride and at least another of said dielectric segments comprises silicon oxide.