Semiconductor device and electronic device

1. A semiconductor device configured to be connected to another semiconductor device and first and second memories, the semiconductor device comprising:

first and second memory interfaces;

a first memory controller configured to output a first control signal to be supplied to the first and second memories or to the first memory through the first memory interface and to output a first data signal to be supplied to the first memory through the first memory interface;

a second memory controller configured to output a second control signal and a second data signal to be supplied to the second memory through the second memory interface;

an inter-device interface for communicating with the other semiconductor device;

an internal bus coupling together the first memory controller, the second memory controller, and the inter-device interface;

terminals configured to be connected to the other semiconductor device, the terminals not being connected to the internal bus;

a first selector having an end connected only to the terminals and another end configured to be selectively connected to one of the second memory interface and the inter-device interface so as to select between connecting the second memory interface to the terminals and connecting the inter-device interface to the terminals; and

a second selector different from the first selector and having an end connected only to the second memory interface and another end configured to be selectively connected to one of the first and second memory controllers so as to select between connecting the second memory interface to the first memory controller and connecting the second memory interface to the second memory controller,

wherein:

the first selector is configured to select one of a first signal line connected to the second memory interface that is able to transfer a signal output from the second selector and a second signal line connected to the inter-device interface in accordance with an operation mode, and to couple the selected signal line to the terminals, and

the second selector is configured to select one of a third signal line connected to the first memory controller that is able to transfer the first control signal and a fourth signal line connected to the second memory controller that is able to transfer the second control signal in accordance with the operation mode, and to couple the selected signal line to the second memory interface.

2. The semiconductor device according to claim 1 , further comprising a mode terminal for setting the operation mode.

3. The semiconductor device according to claim 2 , further comprising a decoder configured to decode a value which is set to the mode terminal.

4. The semiconductor device according to claim 1 , wherein when the operation mode is a mode in which the semiconductor device communicates with the other semiconductor device,

the first selector selects the second signal line, and the second selector selects the third signal line.

5. The semiconductor device according to claim 4 , wherein when the operation mode is a mode in which the semiconductor device communicates with the other semiconductor device,

the first memory interface outputs the first control signal to the first and second memories, and

the second memory interface outputs the second data signal received from the second memory controller to the second memory based on the first control signal received through the second selector.

6. The semiconductor device according to claim 4 , further comprising a CPU configured to access the other semiconductor device through the inter-device interface when the operation mode is a mode in which the semiconductor device communicates with the other semiconductor.

7. The semiconductor device according to claim 1 , wherein when the operation mode is a mode in which the semiconductor device is used singly,

the first selector selects the first signal line, and

the second selector selects the fourth signal line.

8. The semiconductor device according to claim 7 , wherein when the operation mode is a mode in which the semiconductor device is used singly,

the first memory interface is configured to output the first control signal to the first memory, and

the second memory interface is configured to output the second control signal received through the second selector to the second memory through the first selector.

9. An electronic device comprising:

the semiconductor device according to claim 1 ; and

the first and second memories configured to be connected to the semiconductor device.

10. The electronic device according to claim 9 , wherein:

the operation mode is a mode in which the semiconductor device is used singly,

the first selector selects the first signal line, and

the second selector selects the fourth signal line.

11. The electronic device according to claim 9 , further comprising the other semiconductor device connected to the semiconductor device.

12. The electronic device according to claim 11 , wherein:

the operation mode is a mode in which the semiconductor device communicates with the other semiconductor device,

the first selector selects the second signal line, and

the second selector selects the third signal line.

13. The electronic device according to claim 12 , further comprising a monitor coupled to the semiconductor device.

14. The electronic device according to claim 13 , wherein the electronic device is a car navigation system.