Semiconductor device, radio communication terminal, and method for controlling semiconductor device
View Patent ↗A semiconductor device according to the present invention includes a PLL circuit, in which the PLL circuit includes: a phase difference detection unit that detects a phase difference between a reference signal and a division signal; a filter that outputs a control signal according to a detection result of the phase difference detection unit; an oscillation unit that outputs an oscillation signal of a frequency according to the control signal; a division unit that divides the oscillation signal to output it as the division signal; a noise intensity detection unit that detects a noise intensity of a predetermined frequency component included in the control signal; and a phase difference adjustment unit that adjusts a phase difference between the reference signal and the division signal based on the noise intensity detected by the noise intensity detection unit.
1. A semiconductor device comprising a PLL circuit,
wherein the PLL circuit includes:
(a) a phase difference detection unit that detects a phase difference between a reference signal and a division signal;
(b) a filter that outputs a control signal according to a detection result of the phase difference detection unit;
(c) an oscillation unit that outputs an oscillation signal of a frequency according to the control signal;
(d) a division unit that divides the oscillation signal to output it as the division signal;
(e) a noise intensity detection unit that detects a noise intensity of a predetermined frequency component included in the control signal; and
(f) a phase difference adjustment unit that adjusts a phase difference between the reference signal and the division signal based on the noise intensity detected by the noise intensity detection unit.
2. The semiconductor device according to claim 1 , wherein the noise intensity detection unit detects the noise intensity by performing Fourier transform of the predetermined frequency component included in the control signal.
3. The semiconductor device according to claim 1 , wherein the phase difference adjustment unit adjusts the phase difference between the reference signal and the division signal using a span of adjustable range corresponding to the noise intensity indicating a minimum value among the plurality of noise intensities detected in a case where the phase difference has been adjusted using a plurality of different spans of adjustable range, respectively.
4. The semiconductor device according to claim 1 , wherein the phase difference adjustment unit adjusts the phase difference between the reference signal and the division signal so that the noise intensity detected by the noise intensity detection unit after phase difference adjustment indicates the minimum value.
5. The semiconductor device according to claim 1 , wherein
the filter is a digital low-pass filter that outputs a digital code according to the detection result of the phase difference detection unit as the control signal, and
the oscillation unit is a digital control oscillator that outputs the oscillation signal of a frequency according to the digital code as the control signal.
6. The semiconductor device according to claim 1 , wherein
the PLL circuit further comprises an AD converter,
the filter is a low-pass filter that outputs the control signal of a voltage value according to the detection result of the phase difference detection unit,
the oscillation unit is a voltage control oscillator that outputs the oscillation signal of a frequency according to the voltage value of the control signal,
the AD converter converts the voltage value of the control signal into a digital signal, and
the noise intensity detection unit detects a noise intensity of a predetermined frequency component included in the digital signal.
7. The semiconductor device according to claim 1 further comprising a mixer that modulates a baseband signal to a high-frequency signal or demodulates the high-frequency signal to the baseband signal based on the oscillation signal.
8. A radio communication terminal according to claim 7 comprising the semiconductor device.
9. A method for controlling a semiconductor device comprising a PLL circuit, including the steps of:
(a) detecting a phase difference between a reference signal and a division signal;
(b) outputting a control signal according to a detection result of the phase difference;
(c) outputting an oscillation signal of a frequency according to the control signal;
(d) dividing the oscillation signal to output it as the division signal;
(e) detecting a noise intensity of a predetermined frequency component included in the control signal; and
(f) adjusting the phase difference between the reference signal and the division signal based on the detected noise intensity.
10. The method for controlling the semiconductor device according to claim 9 , wherein the noise intensity is detected by performing Fourier transform of the predetermined frequency component included in the control signal.
11. The method for controlling the semiconductor device according to claim 9 , wherein
the phase difference between the reference signal and the division signal is adjusted by a plurality of different spans of adjustable range, respectively,
the plurality of noise intensities are detected in a case where the phase difference has been adjusted by the plurality of different spans of adjustable range, respectively, and
the phase difference between the reference signal and the division signal is adjusted using a span of adjustable range corresponding to the noise intensity indicating a minimum value among the plurality of noise intensities.
12. The method for controlling the semiconductor device according to claim 9 , wherein the phase difference between the reference signal and the division signal is adjusted so that the noise intensity detected after phase difference adjustment indicates the minimum value.