Protection of an integrated circuit against attacks

1. An integrated circuit comprising:

a semiconductor substrate of a first conductivity type;

a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of said regions being laterally delimited along its entire periphery by a region of the second conductivity type; and

a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.

2. The integrated circuit of claim 1 , wherein the substrate ( 102 ) contains at least one well defining an active area of the integrated circuit, said regions of the first conductivity type extending down to a depth at least equal to that of said well.

3. The integrated circuit of claim 2 , wherein said regions of the first conductivity type extend down to a depth greater than that of said well.

4. The integrated circuit of claim 2 , further comprising a region of the second conductivity type extending under at least a portion of said well, said regions of the first conductivity type extending down to a depth at least equal to that of said region of the second conductivity type.

5. The integrated circuit of claim 1 , wherein each of said regions of the first conductivity type is connected to a node of application of a voltage via a switch.

6. The integrated circuit of claim 5 , wherein said nodes are interconnected by a conductive path formed on the front side of the integrated circuit.

7. The integrated circuit of claim 6 , wherein said device is capable of detecting a breakage of said conductive path.

8. The integrated circuit of claim 1 , wherein said device is further capable of implementing measures for protecting the integrated circuit.

9. The integrated circuit of claim 1 , wherein the semiconductor substrate is formed of a layer of a semiconductor material grown by epitaxy on a semiconductor support.