DISPLAY DEVICE, SEMICONDUCTOR DEVICE, AND DRIVING METHOD THEREOF
An object is to provide a semiconductor device with improved operation. The semiconductor device includes a first transistor, and a second transistor electrically connected to a gate of the first transistor. A first terminal of the first transistor is electrically connected to a first line. A second terminal of the first transistor is electrically connected to a second line. The gate of the first transistor is electrically connected to a first terminal or a second terminal of the second transistor.
1 . (canceled)
2 . A semiconductor device comprising:
a first transistor;
a second transistor; and
a third transistor,
wherein one of a source and a drain of the first transistor is electrically connected to a first line, the other of the source and the drain of the first transistor is electrically connected to a second line, and a gate of the first transistor is electrically connected to one of a source and a drain of the third transistor,
wherein one of a source and a drain of the second transistor is electrically connected to the second line, the other of the source and the drain of the second transistor is electrically connected to a third line, and a gate of the second transistor is electrically connected to a fourth line,
wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the third transistor and a fifth line,
wherein each channel region of the first transistor, the second transistor and the third transistor includes an oxide semiconductor,
wherein each one of the first transistor, the second transistor and the third transistor comprises:
a first insulating layer over and at least partly in contact with the channel region; and
a second insulating layer over the first insulating layer,
wherein the first insulating layer includes silicon and oxygen, and
wherein the second insulating layer includes silicon and nitrogen.
3 . The semiconductor device according to claim 2 , wherein each off-state current of at least the second transistor and the third transistor is 1 aA/mm or less.
4 . A display device comprising the semiconductor device according to claim 2 .
5 . An electronic appliance comprising the semiconductor device according to claim 2 .
6 . The semiconductor device according to claim 2 , wherein the second insulating layer is at least partly in contact with the first insulating layer.
7 . The semiconductor device according to claim 2 , wherein the third line is configured to supply power supply voltage.
8 . The semiconductor device according to claim 2 , wherein the fifth line is configured to supply a start pulse signal.
9 . A semiconductor device comprising:
a first transistor;
a second transistor; and
a third transistor,
wherein one of a source and a drain of the first transistor is electrically connected to a first line, the other of the source and the drain of the first transistor is electrically connected to a second line, and a gate of the first transistor is electrically connected to one of a source and a drain of the third transistor,
wherein one of a source and a drain of the second transistor is electrically connected to the second line, the other of the source and the drain of the second transistor is electrically connected to a third line, and a gate of the second transistor is electrically connected to a fourth line,
wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the third transistor and a fifth line,
wherein each channel region of the first transistor, the second transistor and the third transistor includes an oxide semiconductor,
wherein each one of the first transistor, the second transistor and the third transistor comprises:
a first insulating layer over and at least partly in contact with the channel region; and
a second insulating layer over the first insulating layer,
wherein the first insulating layer includes silicon and oxygen,
wherein the second insulating layer includes silicon and nitrogen, and
wherein a ratio of a channel width to a channel length of the first transistor is higher than those of the second transistor and the third transistor.
10 . The semiconductor device according to claim 9 , wherein each off-state current of at least the second transistor and the third transistor is 1 aA/mm or less.
11 . A display device comprising the semiconductor device according to claim 9 .
12 . An electronic appliance comprising the semiconductor device according to claim 9 .
13 . The semiconductor device according to claim 9 , wherein the second insulating layer is at least partly in contact with the first insulating layer.
14 . The semiconductor device according to claim 9 , wherein the third line is configured to supply power supply voltage.
15 . The semiconductor device according to claim 9 , wherein the fifth line is configured to supply a start pulse signal.
16 . The semiconductor device according to claim 9 , wherein the ratio of the channel width to the channel length of the first transistor is twice or more and less than 20 times the ratio of the channel width to the channel length of the second transistor.
17 . A semiconductor device comprising:
a first transistor;
a second transistor;
a third transistor; and
a fourth transistor,
wherein one of a source and a drain of the first transistor is electrically connected to a first line, the other of the source and the drain of the first transistor is electrically connected to a second line, and a gate of the first transistor is electrically connected to one of a source and a drain of the third transistor,
wherein one of a source and a drain of the second transistor is electrically connected to the second line, the other of the source and the drain of the second transistor is electrically connected to a third line, and a gate of the second transistor is electrically connected to a fourth line,
wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the third transistor and a fifth line,
wherein one of a source and a drain of the fourth transistor is electrically connected to the gate of the first transistor, the other of the source and the drain of the fourth transistor is electrically connected to the third line, and the gate of the fourth transistor is electrically connected to a sixth line,
wherein each channel region of the first transistor, the second transistor, the third transistor and the fourth transistor includes an oxide semiconductor,
wherein each one of the first transistor, the second transistor, the third transistor and the fourth transistor comprises:
a first insulating layer over and at least partly in contact with the channel region; and
a second insulating layer over the first insulating layer,
wherein the first insulating layer includes silicon and oxygen, and
wherein the second insulating layer includes silicon and nitrogen.
18 . The semiconductor device according to claim 17 , wherein each off-state current of at least the second transistor and the third transistor is 1 aA/mm or less.
19 . A display device comprising the semiconductor device according to claim 17 .
20 . An electronic appliance comprising the semiconductor device according to claim 17 .
21 . The semiconductor device according to claim 17 , wherein the second insulating layer is at least partly in contact with the first insulating layer.
22 . The semiconductor device according to claim 17 , wherein the third line is configured to supply power supply voltage.
23 . The semiconductor device according to claim 17 , wherein the fifth line is configured to supply a start pulse signal.
24 . The semiconductor device according to claim 17 , wherein a ratio of a channel width to a channel length of the first transistor is higher than those of the second transistor, the third transistor and the fourth transistor.
25 . The semiconductor device according to claim 24 , wherein the ratio of the channel width to the channel length of the first transistor is twice or more and less than 20 times the ratio of the channel width to the channel length of the second transistor.