PWM generation for DC/DC converters with frequency switching

1. A method for generating a pulse width modulation (PWM) control signal comprising the steps of:

generating a sawtooth ramp signal at a first frequency having a first ramp slope under standard operating conditions using a ramp generator, the ramp generator utilizing a single-ended primary inductance converter (SEPIC) operating in discontinuous mode;

generating a PWM square wave having a rising edge at a falling edge of the sawtooth ramp signal and a falling edge when said sawtooth ramp signal exceeds an error threshold;

adjusting the first frequency of the sawtooth ramp signal to a second frequency having a second ramp slope by a first factor in a first direction, which first direction is either decreasing or increasing, in response to a changed operating parameter of the ramp generator, the first factor being a ratio of the first frequency to the second frequency, the second ramp slope being the first ramp slope divided by a square root of the first factor; and

adjusting a peak sawtooth voltage of the ramp generator by a second factor in a second direction, the second factor being the square root of the first factor, and the second direction being opposite of the first direction, simultaneous with adjusting the first frequency of the sawtooth ramp signal to the second frequency, such that a duty cycle of the PWM square wave is adjusted by the second factor in the second direction, thereby preventing one of a voltage overshoot and a voltage undershoot.

2. The method of claim 1 , wherein the changing operating parameter of the ramp generator is at least one of an increase in a load, a decrease in a load, and a decrease in an available input power.

3. The method of claim 1 , wherein maintaining the SEPIC converter in the discontinuous mode is achieved by utilizing a compensation loop.

4. A pulse width modulation (PWM) signal generator circuit comprising:

a voltage source;

a control circuit operable to receive input power from said voltage source and operable to generate a sawtooth voltage ramp signal at a first frequency having a first ramp slope using a ramp generator, the ramp generator utilizing a single-ended primary-inductance converter (SEPIC) configured to operate in discontinuous mode;

an oscillator connected to the ramp generator such that said oscillator controls the first frequency of the sawtooth voltage ramp signal generated by the ramp generator;

an error amplifier operable to set an error voltage threshold;

a comparator connected to an output of the ramp generator and an output of the error amplifier such that said comparator compares the output of the ramp generator against the output of the error amplifier;

a flip-flop connected to the output of the comparator and operable to output a PWM control signal;

wherein the control circuit is operable to adjust the first frequency of the sawtooth voltage ramp signal of the ramp generator to a second frequency having a second ramp slope in response to a changed operating state of a power stage, the control circuit including a memory storing instructions operable to cause the control circuit to adjust a peak sawtooth voltage of the control circuit simultaneously with the frequency adjustment; and

wherein said control circuit is operable to adjust the peak sawtooth voltage of the ramp generator by a first factor in a first direction, which first direction is either decreasing or increasing, and wherein said control circuit is operable to adjust the first frequency of the sawtooth voltage ramp signal of the ramp generator to a second frequency by a second factor in a second direction, wherein the first factor is a square root of the second factor, and the second direction is opposite of the first direction, and wherein a duty cycle of a generated PWM signal is adjusted by the first factor in the first direction simultaneous with the frequency adjustment, the second factor being a ratio of the first frequency to the second frequency, and the second ramp slope being the first ramp slope divided by the square root of the second factor.

5. The PWM signal generator circuit of claim 4 , wherein each of said oscillator, comparator, error amplifier and said flip-flop are components of an application specific integrated circuit (ASIC).