IP Library Patent Application 14090405
Patent Application
App. No. 14/090,405

MANUFACTURING METHOD FOR SOLAR CELL

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Patent No.
US None
App. No.
14/090,405
Abstract

Provided is a method for manufacturing a solar cell with improved output characteristics. A hydrogen radical treatment, in which ions are not used, is performed on at least one of the first and second semiconductor layers ( 11, 13 ).

Claims (32)

1 . A manufacturing method for a solar cell comprising the steps of:

forming a first semiconductor layer of one type of conductivity on the first main surface of a semiconductor substrate of the one type of conductivity;

forming a second semiconductor layer of the other type of conductivity on the second main surface of the semiconductor substrate; and

performing hydrogen radical treatment without using ions on at least one of the first and second semiconductor layers.

2 . The manufacturing method for a solar cell according to claim 1 , wherein the hydrogen radical treatment without using ions is performed using at least one of the remote plasma method, the catalytic chemical vapor deposition method, and the hot wire method.

3 . The manufacturing method for a solar cell according to claim 1 , wherein the step of forming the first semiconductor layer comprises the steps of:

forming a substantially intrinsic i-type amorphous silicon semiconductor layer on the first main surface of the semiconductor layer; and

forming an amorphous silicon semiconductor layer of the one type of conductivity on the i-type amorphous silicon semiconductor layer;

the hydrogen radical treatment without using ions being performed on the amorphous silicon semiconductor layer of the one type of conductivity.

4 . The manufacturing method for a solar cell according to claim 1 , wherein the step of forming the second semiconductor layer comprises the steps of:

forming a substantially intrinsic i-type amorphous silicon semiconductor layer on the second main surface of the semiconductor layer; and

forming an amorphous silicon semiconductor layer of the other type of conductivity on the i-type amorphous silicon semiconductor layer;

the hydrogen radical treatment without using ions being performed on the amorphous silicon semiconductor layer of the other type of conductivity.

5 . The manufacturing method for a solar cell according to claim 3 further comprising the steps of: exposing the semiconductor substrate to the air, and forming a transparent conductive oxide layer on at least one of the first and second semiconductor layers after the hydrogen radical treatment has been performed.

6 . A manufacturing method for a solar cell comprising the steps of:

forming a substantially intrinsic first i-type semiconductor layer on the first main surface of a semiconductor substrate of one type of conductivity;

forming a first semiconductor layer of the one type of conductivity on the first i-type semiconductor layer;

forming a substantially intrinsic second i-type semiconductor layer on the second main surface of the semiconductor substrate; and

forming the second semiconductor layer of the other type of conductivity on the second i-type semiconductor layer;

the hydrogen radical treatment without using ions being performed on at least one of the first and second i-type semiconductor layers after the formation of the first i-type semiconductor layer or after the formation of the second i-type semiconductor layer.

7 . The manufacturing method for a solar cell according to claim 6 , wherein the hydrogen radical treatment without using ions is performed using at least one of the remote plasma method, the catalytic chemical vapor deposition method, and the hot wire method.

8 . The manufacturing method according to claim 6 , wherein at least one of the first i-type semiconductor layer, the first semiconductor layer, the second i-type conductive layer, and the second semiconductor layer is an amorphous silicon semiconductor containing hydrogen.

9 . A manufacturing method for a plurality of solar cells including a substrate, a substantially intrinsic i-type semiconductor layer arranged on the substrate, and a semiconductor layer doped with a dopant arranged on the substrate, the method comprising the steps of:

a first fixing step for fixing the substrate to a tray;

a semiconductor layer formation step for forming the i-type semiconductor layer on the substrate fixed to the tray, and then forming a semiconductor layer doped with a dopant;

an irradiation step after the semiconductor layer formation step for irradiating at least one of hydrogen radicals and hydrogen ions in the tray;

a removal step for removing the semiconductor from the tray before the irradiation step or after the irradiation step; and

a second fixing step for fixing a new substrate to the tray from which the substrate was removed in the removal step;

the second fixing step, the semiconductor layer formation step, the irradiation step, and the removal step being repeated several more times.

10 . The manufacturing method for a solar cell according to claim 9 , wherein the irradiation step is performed before the removal step.

11 . The manufacturing method for a solar cell according to claim 10 , wherein the transparent conductive layer is formed on the semiconductor layer doped with the dopant after the irradiation step.

12 . The manufacturing method for a solar cell according to claim 9 , wherein the solar cell comprises: a semiconductor substrate composed of a substrate having one type of conductivity; a first semiconductor layer composed of a semiconductor layer having the one type of conductivity arranged on the semiconductor substrate, and being doped with the dopant; a second semiconductor layer composed of a semiconductor layer having the other type of conductivity arranged on the semiconductor substrate, and being doped with the dopant; a first substantially intrinsic i-type semiconductor layer arranged between the semiconductor substrate and the first semiconductor layer; and a second substantially intrinsic i-type semiconductor layer arranged between the semiconductor substrate and the second semiconductor layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: SANYO ELECTRIC CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 035071/0276 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 035071/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 26, 2013
From: KAI, MOTOHIDE; UEYAMA, TOMONORI; SHIMA, MASAKI
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 031679/0037 →