IP Library Granted Patent US 9,652,370
Granted Patent B2
US 9,652,370 · App. 14/097,924 · Granted May 16, 2017

Address range decomposition

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Quick Facts
Patent No.
US 9,652,370
App. No.
14/097,924
Granted
May 16, 2017
Kind
B2
Abstract

Smart bridge and use. The smart bridge includes a functional unit, memory, and a switch for routing data between a host and multiple devices using a routing table. The bridge stores a forwarding address range (FAR) as a bridge representation of hardware memory resources required by the devices. The FAR is an integer multiple of a first specified minimum size and is aligned with the first specified minimum size. The bridge representation is converted to an endpoint representation that includes multiple virtual memory resources based on a starting address of the FAR. Each virtual memory resource has a respective sub-address range with a size that is a power of 2 multiple of a second specified minimum size, which is less than the first specified minimum size, and is aligned accordingly. The endpoint representation is usable by the switch or the host to allocate the virtual memory resources to the devices.

Claims (67)

1. A smart bridge, configured to be interposed between a bus host device and a plurality of devices that require respective amounts of memory resources of the bus host device, wherein the smart bridge comprises:

a functional unit;

memory, coupled to the functional unit; and

at least one switch, coupled to the functional unit, wherein the at least one switch is configured to route data between the bus host device and the plurality of devices using a routing table;

wherein the memory stores program instructions executable by the functional unit to:

store a forwarding address range comprising a bridge representation of a plurality of hardware memory resources required by a plurality of devices, wherein the forwarding address range is an integer multiple of a first specified minimum size and is aligned with the first specified minimum size; and

convert the bridge representation of the plurality of hardware memory resources to an endpoint representation comprising a plurality of virtual memory resources based on a starting address of the forwarding address range, wherein each virtual memory resource comprises a respective sub-address range with a size that is a power of 2 multiple of a second specified minimum size and is aligned with its size, wherein the second specified minimum size is less than the first specified minimum size; and

wherein the endpoint representation is usable by the at least one switch or the bus host device to allocate the virtual memory resources to the plurality of devices; and

wherein the bridge representation and the forwarding address range are binary numbers, and wherein to convert the bridge representation of the plurality of hardware memory resources to the endpoint representation, the program instructions are executable to:

while there are virtual memory resources to allocate:

determine if a current base address of the forwarding address range is aligned;

allocate a next virtual memory resource to the forwarding address range at the current base address, where the size of the sub-address range of the virtual memory resource is based on the least significant 1 bit of the current base address, in response to determining that the starting address of the forwarding address range is not aligned; and

allocate the next virtual memory resource to the forwarding address range at the current base address, where the size of the sub-address range of the virtual memory resource is based on the most significant 1 bit of the current forwarding address size, in response to determining that the starting address of the forwarding address range is aligned.

2. The smart bridge of claim 1 , wherein the starting address is aligned, wherein the bridge representation is a binary number, wherein the number of virtual memory resources is equal to the number of “1” bits in the bridge representation, and wherein to convert the bridge representation of the plurality of hardware memory resources to the endpoint representation, the program instructions are executable to:

for each “1” bit in the bridge representation, create a respective virtual memory resource whose size is equal to the value of the “1” bit's position; and

order the virtual memory resources based on the starting address of the forwarding address range, including assigning respective address sub-ranges to the respective virtual memory resources such that each sub-address range is aligned according to its size;

wherein the virtual memory resource sub-ranges are contiguous and compose the forwarding address range.

3. The smart bridge of claim 2 , wherein said assigning respective address sub-ranges to the respective virtual memory resources comprises:

allocating the virtual memory resources to the forwarding address range beginning with the starting address, wherein the virtual memory resources are allocated from smallest up until an ending address of a virtual memory resource sub-range is aligned in accordance with the largest remaining virtual memory resource to be allocated; and

allocating the remaining virtual memory resources from largest down.

4. The smart bridge of claim 1 , wherein the program instructions are further executable to configure the routing table in accordance with the endpoint representation.

5. The smart bridge of claim 1 , wherein the program instructions are further executable to implement a proxy device based on the endpoint representation, and wherein the bridge presents itself to the bus host device as the proxy device requesting the plurality of memory resources.

6. The smart bridge of claim 1 , wherein the forwarding address range is received from a downstream bridge.

7. The smart bridge of claim 1 , wherein the forwarding address range comprises:

the starting address; and

size of the forwarding address range.

8. The smart bridge of claim 1 , wherein the forwarding address range comprises:

the starting address; and

an ending address.

9. The smart bridge of claim 1 , wherein the smart bridge is configured to operate in accordance with a protocol, the protocol comprising one or more of:

Peripheral Component Interconnect Express (PCIe); or

PXI Express (PXIe).

10. A method, comprising:

storing, by a bridge, a forwarding address range comprising a bridge representation of a plurality of hardware memory resources required by a plurality of devices, wherein the forwarding address range is an integer multiple of a first specified minimum size and is aligned with the first specified minimum size; and

converting, by the bridge, the bridge representation of the plurality of hardware memory resources to an endpoint representation comprising a plurality of virtual memory resources based on a starting address of the forwarding address range, wherein each virtual memory resource comprises a respective sub-address range with a size that is a power of 2 multiple of a second specified minimum size and is aligned with its size;

wherein the endpoint representation is usable by the bridge or a bus host device to allocate the virtual memory resources to the plurality of devices; and

wherein the starting address is aligned, wherein the bridge representation is a binary number, wherein the number of virtual memory resources is equal to the number of “1” bits in the bridge representation, and wherein said converting the bridge representation of the plurality of hardware memory resources to the endpoint representation comprises:

for each “1” bit in the bridge representation, creating a respective virtual memory resource whose size is equal to the value of the “1” bit's position; and

ordering the virtual memory resources based on the starting address of the forwarding address range, including assigning respective address sub-ranges to the respective virtual memory resources such that each sub-address range is aligned according to its size;

wherein the virtual memory resource sub-ranges are contiguous and compose the forwarding address range.

11. The method of claim 10 , wherein the bridge representation and the forwarding address range are binary numbers, and wherein said converting the bridge representation of the plurality of hardware memory resources to the endpoint representation comprises:

while there are virtual memory resources to allocate:

determining if a current base address of the forwarding address range is aligned;

allocating a next virtual memory resource to the forwarding address range at the current base address, where the size of the sub-address range of the virtual memory resource is based on the least significant 1 bit of the current base address, in response to determining that the starting address of the forwarding address range is not aligned; and

allocating the next virtual memory resource to the forwarding address range at the current base address, where the size of the sub-address range of the virtual memory resource is based on the most significant 1 bit of the current forwarding address size, in response to determining that the starting address of the forwarding address range is aligned.

12. The method of claim 10 , wherein said assigning respective address sub-ranges to the respective virtual memory resources comprises:

allocating the virtual memory resources to the forwarding address range beginning with the starting address, wherein the virtual memory resources are allocated from smallest up until an ending address of a virtual memory resource sub-range is aligned in accordance with the largest remaining virtual memory resource to be allocated; and

allocating the remaining virtual memory resources from largest down.

13. The method of claim 10 , further comprising:

configuring the routing table in accordance with the endpoint representation.

14. The method of claim 10 , further comprising:

implementing, by the bridge, a proxy device based on the endpoint representation; and

whereby the bridge presents itself to the bus host device as the proxy device requesting the plurality of memory resources.

15. The method of claim 10 , wherein the forwarding address range is received from a downstream bridge.

16. The method of claim 10 , wherein the forwarding address range comprises:

the starting address and size of the forwarding address range; or

the starting address and an ending address.

17. The method of claim 10 , wherein the bridge is configured to operate in accordance with a protocol, the protocol comprising one or more of:

Peripheral Component Interconnect Express (PCIe); or

PXI Express (PXIe).

18. A non-transitory computer accessible memory medium that stores program instructions executable by a smart bridge to implement:

storing a forwarding address range comprising a bridge representation of a plurality of hardware memory resources required by a plurality of devices, wherein the forwarding address range is an integer multiple of a first specified minimum size and is aligned with the first specified minimum size; and

converting the bridge representation of the plurality of hardware memory resources to an endpoint representation comprising a plurality of virtual memory resources based on a starting address of the forwarding address range, wherein each virtual memory resource comprises a respective sub-address range with a size that is a power of 2 multiple of a second specified minimum size and is aligned with its size;

wherein the endpoint representation is usable by the smart bridge or a bus host device to allocate the virtual memory resources to the plurality of devices; and

wherein the bridge is configured to operate in accordance with a protocol, the protocol comprising one or more of:

Peripheral Component Interconnect Express (PCIe); or

PXI Express (PXIe).

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2013
From: JONES, CRAIG S.
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 031725/0048 →