IP Library Granted Patent US 9,654,710
Granted Patent B2
US 9,654,710 · App. 14/102,463 · Granted May 16, 2017

Photodiode limiter

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Quick Facts
Patent No.
US 9,654,710
App. No.
14/102,463
Granted
May 16, 2017
Kind
B2
Abstract

An image sensor is provided. In one aspect, the image sensor includes a pixel coupled to an output line. The pixel includes a photodiode configured to generate electrical charges in response to light and a supply circuit configured to supply a voltage to the photodiode to keep a voltage of the photodiode at or above a threshold level in an integration time. In another aspect, the pixel includes a supply circuit configured to selectively supply voltage to the photodiode in a first charge holding capacity and a second charge holding capacity.

Claims (25)

1. An image sensor, comprising:

a pixel having a photodiode responsive to light;

a shutter circuit configured to control integration time of the photodiode; and

a photodiode limiter configured to limit the photodiode's response to light during the integration time,

wherein the shutter circuit is further configured to control a supply voltage to the photodiode to limit a voltage differential between the supply voltage and a voltage generated by the photodiode in response to light during the integration time.

2. The image sensor of claim 1 , wherein the photodiode limiter is further configured to limit voltage generated by the photodiode in response to the light during the integration time.

3. The image sensor of claim 1 , wherein the photodiode limiter is further configured to prevent voltage generated by the photodiode in response to light during the integration time from decreasing below a threshold.

4. An image sensor, comprising:

a pixel having a photodiode responsive to light;

a shutter circuit configured to control integration time of the photodiode; and

a photodiode limiter configured to limit the photodiode's response to light during the integration time,

wherein the pixel comprises a transistor coupled to the photodiode, and wherein the shutter circuit is further configured to control the transistor to provide the supply voltage to the photodiode, and

wherein the photodiode limiter is further configured to limit the photodiode's response to light during the integration time by controlling the operation of the transistor.

5. The image sensor of claim 4 , wherein the transistor comprises a gate, and wherein the photodiode limiter is further configured to limit the photodiode's response to light during the integration time by controlling a voltage applied to the gate.

6. A method for operating an image sensor, comprising a pixel, having a photodiode responsive to light, the method comprising:

controlling integration time of the photodiode;

limiting the photodiode's response to light during the integration time; and

controlling a supply voltage to the photodiode to limit a voltage differential between the supply voltage and a voltage generated by the photodiode in response to light during the integration time.

7. The method of claim 6 , wherein the limiting of the photodiode's response to light comprises limiting voltage generated by the photodiode.

8. The method of claim 6 , wherein the limiting of the photodiode's response to light comprises preventing voltage generated by the photodiode in response to light during the integration time from decreasing below a threshold.

9. The method of claim 6 , further comprising providing the supply voltage to the photodiode through a transistor.

10. The method of claim 9 , wherein the limiting of the photodiode's response to light during the integration time comprises controlling the operation of the transistor.

11. The method of claim 10 , wherein the limiting of the photodiode's response to light during the integration time further comprises controlling a voltage applied to a gate of the transistor.

12. The image sensor of claim 1 , wherein the photodiode limiter includes the shutter circuit.

13. The image sensor of claim 4 , wherein the photodiode limiter includes the shutter circuit.

Assignments (4)
ASSIGNMENT OF INTELLECTUAL PROPERTY SECURITY AGREEMENTS Recorded Dec 12, 2025
From: MS PRIVATE CREDIT ADMINISTRATIVE SERVICES LLC
To: MGG INVESTMENT GROUP LP
Reel/Frame 073959/0584 →
SECURITY INTEREST Recorded Mar 20, 2024
From: GRASS VALLEY CANADA; GRASS VALLEY LIMITED
To: MS PRIVATE CREDIT ADMINISTRATIVE SERVICES LLC
Reel/Frame 066850/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2021
From: GVBB HOLDINGS S.A.R.L.
To: GRASS VALLEY CANADA
Reel/Frame 056100/0612 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2014
From: ROTTE, JEROEN; CENTEN, PETER
To: GVBB HOLDINGS S.A.R.L.
Reel/Frame 033747/0140 →