System and method for cycle slip correction
View Patent ↗A system and method including a parity bit encoder for encoding bits of data to be transmitted with first and second parity check bits to produce successive block of bits. Each of the blocks of bits are Gray mapped to a plurality of associated QAM symbols that are modulated onto an optical wavelength and transmitted to a receiver. A de-mapper corrects for 90 degree and 180 degree cycle slip using parity indicated by the first and second parity bits.
1. A system comprising:
a parity bit encoder configured to encode a plurality of bits with a first parity bit and a second parity bit to provide successive blocks of bits;
a Gray mapper coupled to said parity bit encoder and configured to map each one of said blocks of bits to an associated plurality of quadrature amplitude modulated (QAM) symbols, whereby said first parity bit indicates a parity of all bits represented by said plurality of QAM symbols and said second parity bit represents a parity of all in-phase or quadrature bits represented by said plurality of QAM symbols;
a modulator coupled to said Gray mapper and configured to modulate an optical signal in response to an output of said Gray mapper to provide a modulated optical signal comprising said associated plurality of QAM symbols;
a detector for receiving said modulated optical signal and providing an electrical signal representative of said optical signal; and
a de-mapper configured to provide a de-mapper output representative of said plurality of bits in response to said electrical signal, said de-mapper being further configured to cause correction of 90 degree and 180 degree cycle slip using parity indicated by said first and second parity bits.
2. A system according to claim 1 , wherein said first parity bit indicates a parity of all bits represented by said plurality of QAM symbols and said second parity bit represents a parity of all in-phase or quadrature bits represented by said plurality of QAM symbols.
3. A system according to claim 1 , wherein said plurality of bits consists of n bits, and successive blocks of bits consists of n+2 bits.
4. A system according to claim 1 , wherein said plurality of QAM symbols comprises an odd number of QAM symbols.
5. A system according to claim 1 , wherein said QAM symbols are M 2 -QAM symbols.
6. A system according to claim 1 , wherein said de-mapper is configured to provide said de-mapper output using a modified blind phase search (BPS) algorithm without phase ambiguity followed by maximum-likelihood (ML) phase estimate.
7. A method comprising:
encoding a plurality of bits with first and second parity bits to provide successive blocks of bits;
Gray mapping said successive blocks of bits to an associated plurality of QAM symbols, whereby said first parity bit indicates a parity of all bits represented by said plurality of QAM symbols and said second parity bit represents a parity of all in-phase or quadrature bits represented by said plurality of QAM symbols;
modulating said plurality of QAM symbols on an optical carrier wavelength to provide a modulated optical signal;
detecting said modulated optical signal to provide an electrical signal;
de-mapping said plurality of QAM symbols from said electrical signal to provide a de-mapper output representative of said plurality of bits; and
using parity indicated by said first and second parity bits to cause correction of 90 degree and 180 degree cycle slip.
8. A method according to claim 7 , wherein said first parity bit indicates a parity of all bits represented by said plurality of QAM symbols and said second parity bit represents a parity of all in-phase or quadrature bits represented by said plurality of QAM symbols.
9. A method according to claim 7 , wherein said plurality of bits consists of n bits, and successive blocks of bits consists of n+2 bits.
10. A method according to claim 7 , wherein said plurality of QAM symbols comprises an odd number of QAM symbols.
11. A method according to claim 7 , wherein said QAM symbols are M 2 -QAM symbols.
12. A method according to claim 7 , wherein said de-mapping is performed using a modified blind phase search (BPS) algorithm without phase ambiguity followed by maximum-likelihood (ML) phase estimate.
13. A method comprising:
encoding a plurality of bits with a parity bit to provide successive blocks of bits;
Gray mapping said successive blocks of bits to an associated plurality of QAM symbols, whereby said parity bit represents a parity of all in-phase or quadrature bits represented by said plurality of QAM symbols;
modulating said plurality of QAM symbols on an optical carrier wavelength to provide a modulated optical signal;
detecting said modulated optical signal to provide an electrical signal;
de-mapping said plurality of QAM symbols from said electrical signal to provide a de-mapper output representative of said plurality of bits; and
using parity indicated by said parity bit to cause correction of 180 degree cycle slip.
14. A method according to claim 13 , wherein said plurality of bits consists of n bits, and successive blocks of bits consists of n+2 bits.
15. A method according to claim 13 , wherein said plurality of QAM symbols comprises an odd number of QAM symbols.
16. A method according to claim 13 , wherein said QAM symbols are M 2 -QAM symbols.
17. A method according to claim 13 , wherein said de-mapping is performed using a modified blind phase search (BPS) algorithm without phase ambiguity followed by maximum-likelihood (ML) phase estimate.