IP Library Patent Application 14108035
Patent Application
App. No. 14/108,035

SILICON SUBSTRATE SUITABLE FOR USE WITH AN RF COMPONENT, AND AN RF COMPONENT FORMED ON SUCH A SILICON SUBSTRATE

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Quick Facts
Patent No.
US None
App. No.
14/108,035
Abstract

A silicon substrate is provided that may facilitate the formation of RF components more cheaply by using a silicon layer formed by the Czochralski process, and having a carrier life time killing layer deposited on the silicon layer.

Claims (15)

1 . A silicon substrate, comprising a silicon structure formed by the Czochralski process, and having a carrier life time killing layer deposited on the silicon structure.

2 . A silicon substrate as claimed in claim 1 , in which the silicon structure has a resistivity of around 3000 to 30000 Ωcm.

3 . A silicon substrate as claimed in claim 1 , in which the carrier lifetime killing layer is a polysilicon layer.

4 . A silicon substrate as claimed in claim 3 , in which the polysilicon has a thickness of between 10 nm and 1000 nm.

5 . A silicon substrate as claimed in claim 3 , in which the polysilicon is undoped or substantially undoped.

6 . A silicon substrate as claimed in claim 1 , further comprising a radio frequency component formed over the carrier lifetime killing layer.

7 . A silicon substrate as claimed in claim 6 , in which the radio frequency component comprises a micro-machined electromechanical switch.

8 . A silicon substrate as claimed in claim 7 , in which the switch is formed over a dielectric layer.

9 . A silicon substrate as claimed in claim 8 , in which the dielectric layer is between 50 nm and 10000 nm thick.

10 . A silicon substrate including a radio frequency component as claimed in claim 6 , in which the radio frequency component is at least one of a transmission line, a filter, a signal combiner, a signal splitter, a RLC network and a directional coupler.

11 . A method of providing a semiconductor substrate for use in the formation of components operating in excess of 1 GHz, comprising forming a carrier life time killing layer over a wafer formed by the CZ process.

12 . A method as claimed in claim 11 , in which forming a carrier life time killing layer comprises depositing a layer of substantially undoped polysilicon over the semiconductor substrate prior to an annealing step.

13 . A method of fabricating a device, comprising forming an electronic component on a semiconductor substrate where the substrate was formed by the CZ process and has a carrier life time killing layer over the substrate.

14 . A method of forming a device as claimed in claim 13 wherein the electronic component comprises an RF MEMS switch, a transmission line, a filter, a signal combiner, a signal splitter, a RLC network or a directional coupler.

15 - 18 . (canceled)

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2022
From: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
To: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Reel/Frame 059102/0208 →
CHANGE OF NAME Recorded Feb 24, 2022
From: ANALOG DEVICES GLOBAL
To: ANALOG DEVICES GLOBAL UNLIMITED COMPANY
Reel/Frame 059093/0619 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2015
From: ANALOG DEVICES TECHNOLOGY
To: ANALOG DEVICES GLOBAL
Reel/Frame 034787/0910 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2014
From: LAMBKIN, PAUL MARTIN; FITZGERALD, PADRAIG L.; STENSON, BERNARD PATRICK; GOGGIN, RAYMOND C.; LYNCH, SEAMUS A.; LANE, WILLIAM A.
To: ANALOG DEVICES TECHNOLOGY
Reel/Frame 032380/0887 →