Digital EMI filter
The invention provides a digital active EMI filter that removes, minimizes, or reduces unwanted interference (i.e., EMI noise) generated by a power circuit such as, for example, a power converter. Digital active filtering includes digital sampling of the incident noise signal amplitude and frequency, discrete time conversion of the EMI noise source, processing (e.g., inverting) the digital signal, and then constructing an analog output signal (i.e., an EMI compensation signal) which is injected to the input of the power circuit. A digital EMI filter as described herein may be used in both differential-mode and common-mode configurations, and overcomes limitations of passive and active analog EMI filters.
1. A method for removing, minimizing, or reducing EMI noise generated by a power circuit, comprising:
(i) combining at an input of the power circuit an EMI compensation signal with EMI noise generated by the power circuit to produce a combined signal; and
(ii) sampling the combined signal and adjusting the EMI compensation signal;
wherein sampling and adjusting comprises:
producing a digital noise signal from the combined signal;
processing the digital noise signal; and
constructing an adjusted EMI compensation signal from the processed digital noise signal;
(iii) repeating steps (i) and (ii) wherein combining is performed with the adjusted EMI compensation signal;
wherein EMI noise at the input of the power circuit is removed, minimized, or reduced.
2. The method of claim 1 , wherein sampling includes using a high pass filter and an analog to digital converter to produce the digital noise signal.
3. The method of claim 2 , wherein processing includes inverting and providing gain to the digital noise signal.
4. The method of claim 3 , wherein constructing includes using a digital to analog converter and a low pass filter to produce the EMI compensation signal.
5. The method of claim 4 , wherein the high pass filter, gain, and low pass filter are selected to remove, minimize, or reduce EMI noise at the input of the power circuit.
6. The method of claim 4 , including preventing high frequency components of the EMI noise from being sampled or conducted to an input power supply of the power circuit.
7. The method of claim 6 , wherein preventing includes using an element having high impedance at high frequency at an input of the power circuit.
8. The method of claim 7 , wherein the element having high impedance at high frequency is inserted between a sampling node and a node where the EMI compensation signal is combined with EMI noise generated by the power circuit.
9. The method of claim 7 , including selecting a low pass filter transfer function that is complementary to a transfer function of the high impedance element.
10. The method of claim 1 , wherein the power circuit is a power converter.
11. The method of claim 1 , wherein at least one of sampling, processing, and constructing is implemented in a digital signal processor (DSP).
12. The method of claim 1 , wherein at least one of sampling, processing, and constructing is implemented in a field programmable gate array (FPGA) or application specific integrated circuit (ASIC).
13. A digital EMI filter for a power circuit, comprising:
means that combines at an input of the power circuit an EMI compensation signal with EMI noise generated by the power circuit to produce a combined signal; and
means that samples the combined signal and adjusts the EMI compensation signal by producing a digital noise signal from the combined signal, processing the digital noise signal;
and constructing an adjusted EMI compensation signal from the processed digital noise signal;
wherein the adjusted EMI compensation signal is subsequently combined with EMI noise generated by the power circuit, such that EMI noise at the input of the power circuit is removed, minimized, or reduced.
14. The filter of claim 13 , wherein the means that samples the combined signal and adjusts the EMI compensation signal comprises:
a high pass filter and an analog to digital converter;
a processor; and
a low pass filter and a digital to analog converter.
15. The filter of claim 14 , wherein the processor includes an inverter that inverts the digital noise signal.
16. The filter of claim 14 , comprising an element having a high impedance at an EMI noise frequency, wherein the element is inserted between a sampling node and a node where the EMI compensation signal is combined with EMI noise generated by the power circuit.
17. The filter of claim 16 , wherein the low pass filter has a transfer function that is complementary to a transfer function of the high impedance element.
18. The filter of claim 14 , wherein at least one of the analog to digital converter, processor, and digital to analog converter is implemented in a field programmable gate array (FPGA) or application specific integrated circuit (ASIC).
19. The filter of claim 14 , wherein at least one of the analog to digital converter, processor, and digital to analog converter is implemented in a digital signal processor (DSP).
20. The filter of claim 13 , wherein the power circuit is a power converter.
21. A power circuit including the filter of claim 13 .
22. A power converter including the filter of claim 13 .