IP Library Patent Application 14115738
Patent Application
App. No. 14/115,738

PARALLEL BIT INTERLEAVER

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Quick Facts
Patent No.
US None
App. No.
14/115,738
Abstract

A bit interleaving method involves applying a bit permutation process to a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N/M folding sections, each of the constellation words being associated with one of the F×N/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.

Claims (19)

1 - 17 . (canceled)

18 . A bit interleaving method interleaving a codeword of quasi-cyclic low-density parity check codes, including repeat-accumulate quasi-cyclic low-density parity check codes,

the bit interleaving method comprising:

an allocation step of allocating codeword bits of the codeword made up of N cyclic blocks each including Q bits to Q×N/M constellation words, each of the constellation words being made up of M bits, wherein

N is a multiple of M/F,

F is an integer greater than one, and is a divisor of M and Q, and

in the allocation step, the M bits in each of the Q/F constellation words include F bits from each of M/F different cyclic blocks in F×N/M folding sections each made up of M/F cyclic blocks.

19 . A bit interleaver interleaving a codeword of quasi-cyclic low-density parity check codes, including repeat-accumulate quasi-cyclic low-density parity check codes,

the bit interleaver comprising:

an allocation unit allocating codeword bits of the codeword made up of N cyclic blocks each including Q bits to Q×N/M constellation words, each of the constellation words being made up of M bits, wherein

N is a multiple of M/F,

F is an integer greater than one, and is a divisor of M and Q, and

the allocation unit allocates the M bits in each of the Q/F constellation words include F bits from each of M/F different cyclic blocks in F×N/M folding sections each made up of M/F cyclic blocks.

20 . A decoding method, comprising:

a demodulation step of generating a demodulated signal by demodulating a signal transmitted by modulating M bits allocated to each of a plurality of constellation words using the bit interleaving method of claim 18 ; and

a decoding step of decoding the demodulated signal and generating original data according to quasi-cyclic low-density parity check codes.

19 . A decoder, comprising:

a demodulating unit generating a demodulated signal by demodulating a signal transmitted by modulating M bits allocated to each of a plurality of constellation words using the bit interleaver of claim 19 ; and

a decoding unit decoding the demodulated signal and generating original data according to quasi-cyclic low-density parity check codes.

Assignments (2)
CHANGE OF NAME Recorded May 9, 2022
From: PANASONIC CORPORATION
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 059911/0943 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2014
From: PETROV, MIHAIL
To: PANASONIC CORPORATION
Reel/Frame 032512/0955 →