IP Library Granted Patent US 9,105,332
Granted Patent B2
US 9,105,332 · App. 14/116,482 · Granted Aug 11, 2015

Variable resistance nonvolatile memory device

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Quick Facts
Patent No.
US 9,105,332
App. No.
14/116,482
Granted
Aug 11, 2015
Kind
B2
Abstract

Provided is a variable resistance element (Rij) the resistance state of which is reversibly changed by applying electrical signals of different polarities; and a current steering element (Dij) in which a first current is larger than a second current, the first current being a current which flows when a voltage of the first polarity having a first value is applied, the first value being less than a predetermined voltage value and having an absolute value greater than zero, the second current being a current which flows when a voltage of the second polarity having an absolute value which is the first value is applied, the second polarity being different from the first polarity, in which Rij and Dij are connected in series such that the polarity of a voltage to be applied to Dij is the second polarity when the resistance state of Rij is changed to high resistance state.

Claims (21)

1. A variable resistance nonvolatile memory device comprising:

a plurality of first signal lines and a plurality of second signal lines which cross;

a memory cell array including a plurality of memory cells disposed at cross points at which the first signal lines and the second signal lines cross, the memory cells each having an end connected to one of the first signal lines and another end connected to one of the second signal lines; and

a write circuit which generates a bipolar voltage to be applied to the memory cells via the first signal lines and the second signal lines;

wherein the memory cells each further include:

a variable resistance element of which a resistance state changes to a low resistance state when a first voltage of a first polarity is applied, and changes to a high resistance state when a second voltage of a second polarity opposite to the first polarity is applied, the high resistance state being higher than the low resistance state in resistance value; and

a current steering element in which a first current is larger than a second current, the first current being a current which flows when a voltage of the first polarity having a first value is applied, the first value being a given value less than a predetermined voltage value and having an absolute value greater than zero, the second current being a current which flows when a voltage of the second polarity having an absolute value which is the first value is applied, and

in each of the memory cells, the variable resistance element and the current steering element are connected in series.

2. The variable resistance nonvolatile memory device according to claim 1 , further comprising

a first current limiting circuit for limiting a current flowing in a direction in which resistance states of the memory cells are changed to the low resistance state, the first current limiting circuit being provided in a path of a current which flows from the write circuit to the memory cells.

3. The variable resistance nonvolatile memory device according to claim 1 , further comprising:

a first current limiting circuit for limiting a current flowing in a direction in which resistance states of the memory cells are changed to the low resistance state, the first current limiting circuit being provided in a path of a current which flows from the write circuit to the memory cells; and

a second current limiting circuit for limiting a current flowing in a direction in which resistance states of the memory cells are changed to the high resistance state, the second current limiting circuit being provided in a path of the current which flows from the write circuit to the memory cells.

4. The variable resistance nonvolatile memory device according to claim 3 ,

wherein a current limit value of the second current limiting circuit is less than a value of a breakdown current for the current steering element.

5. The variable resistance nonvolatile memory device according to claim 3 ,

wherein a current limit value of the second current limiting circuit is a current value at which the resistance state of the variable resistance element changes to the high resistance state.

6. The variable resistance nonvolatile memory device according to claim 3 ,

wherein a current limit value of the first current limiting circuit is equal to a current limit value of the second current limiting circuit.

7. The variable resistance nonvolatile memory device according to claim 1 ,

wherein the write circuit performs a forming operation on the memory cells after the memory cells are formed and before a normal writing operation is executed, the forming operation being an operation in which a voltage of the second polarity having an absolute value greater than a value of the second voltage is applied.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2014
From: IKEDA, YUICHIRO; SHIMAKAWA, KAZUHIKO; KATAYAMA, KOJI; MIKAWA, TAKUMI; TSUJI, KIYOTAKA
To: PANASONIC CORPORATION
Reel/Frame 032286/0866 →